Add new getOperandType(i) method to MachineInstr

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4330 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2002-10-28 04:30:20 +00:00
parent 572f5c8c0c
commit 6d6c3f8618

View File

@ -238,14 +238,6 @@ public:
//
unsigned getNumOperands() const { return operands.size(); }
bool operandIsDefined(unsigned i) const {
return getOperand(i).opIsDef();
}
bool operandIsDefinedAndUsed(unsigned i) const {
return getOperand(i).opIsDefAndUse();
}
const MachineOperand& getOperand(unsigned i) const {
assert(i < operands.size() && "getOperand() out of range!");
return operands[i];
@ -254,6 +246,18 @@ public:
assert(i < operands.size() && "getOperand() out of range!");
return operands[i];
}
MachineOperand::MachineOperandType getOperandType(unsigned i) const {
return getOperand(i).getOperandType();
}
bool operandIsDefined(unsigned i) const {
return getOperand(i).opIsDef();
}
bool operandIsDefinedAndUsed(unsigned i) const {
return getOperand(i).opIsDefAndUse();
}
//
// Information about implicit operands of the instruction
@ -339,7 +343,7 @@ public:
// physical register after register allocation is complete.
//
void SetRegForOperand(unsigned i, int regNum);
//
// Iterator to enumerate machine operands.
//
@ -348,10 +352,10 @@ public:
unsigned i;
MITy MI;
inline void skipToNextVal() {
void skipToNextVal() {
while (i < MI->getNumOperands() &&
!((MI->getOperand(i).getOperandType() == MachineOperand::MO_VirtualRegister ||
MI->getOperand(i).getOperandType() == MachineOperand::MO_CCRegister)
!((MI->getOperandType(i) == MachineOperand::MO_VirtualRegister ||
MI->getOperandType(i) == MachineOperand::MO_CCRegister)
&& MI->getOperand(i).getVRegValue() != 0))
++i;
}