6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-17 21:35:07 +00:00
Code Issues Projects Releases Wiki Activity

Fix a bug in my patch for legalizing to fsel. It cannot handle seteq/setne,

Browse Source 
which I failed to include when I moved the code over.  This fixes
MallocBench/gs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23140 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-08-30 00:45:18 +00:00
parent 8f838720ad
commit 6de08f4377
1 changed files with 4 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
lib/Target/PowerPC/PPCISelLowering.cpp
View File

@ -111,6 +111,10 @@ SDOperand PPC32TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
if (MVT::isFloatingPoint(Op.getOperand(0).getValueType()) &&
MVT::isFloatingPoint(Op.getOperand(2).getValueType())) {
ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
// Cannot handle SETEQ/SETNE.
if (CC == ISD::SETEQ || CC == ISD::SETNE) break;
MVT::ValueType ResVT = Op.getValueType();
MVT::ValueType CmpVT = Op.getOperand(0).getValueType();
SDOperand LHS = Op.getOperand(0), RHS = Op.getOperand(1);