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Revert "Do materialize for floating point"
1) The commit was made despite profound lack of understanding: "I did not understand the comment about using dyn_cast instead of isa. I will commit as is and make the update after. You can explain what you meant to me." Commit first, understand later isn't OK. 2) Review comments were simply ignored: "Can you edit the summary to describe what the patch is for? It appears to be a list of commits at the moment." 3) The patch got LGTM'd off-list without any indication of readiness. 4) The public mailing list was excluded from patch review so all of this was hidden from the community. This reverts commit r210414. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210424 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -167,14 +167,9 @@ bool MipsFastISel::EmitStore(MVT VT, unsigned SrcReg, Address &Addr,
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//
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// more cases will be handled here in following patches.
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//
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if (VT == MVT::i32)
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EmitInstStore(Mips::SW, SrcReg, Addr.Base.Reg, Addr.Offset);
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else if (VT == MVT::f32)
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EmitInstStore(Mips::SWC1, SrcReg, Addr.Base.Reg, Addr.Offset);
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else if (VT == MVT::f64)
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EmitInstStore(Mips::SDC1, SrcReg, Addr.Base.Reg, Addr.Offset);
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else
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if (VT != MVT::i32)
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return false;
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EmitInstStore(Mips::SW, SrcReg, Addr.Base.Reg, Addr.Offset);
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return true;
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}
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@@ -234,22 +229,6 @@ bool MipsFastISel::TargetSelectInstruction(const Instruction *I) {
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}
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unsigned MipsFastISel::MaterializeFP(const ConstantFP *CFP, MVT VT) {
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int64_t Imm = CFP->getValueAPF().bitcastToAPInt().getZExtValue();
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if (VT == MVT::f32) {
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const TargetRegisterClass *RC = &Mips::FGR32RegClass;
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unsigned DestReg = createResultReg(RC);
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unsigned TempReg = Materialize32BitInt(Imm, &Mips::GPR32RegClass);
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EmitInst(Mips::MTC1, DestReg).addReg(TempReg);
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return DestReg;
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} else if (VT == MVT::f64) {
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const TargetRegisterClass *RC = &Mips::AFGR64RegClass;
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unsigned DestReg = createResultReg(RC);
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unsigned TempReg1 = Materialize32BitInt(Imm >> 32, &Mips::GPR32RegClass);
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unsigned TempReg2 =
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Materialize32BitInt(Imm & 0xFFFFFFFF, &Mips::GPR32RegClass);
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EmitInst(Mips::BuildPairF64, DestReg).addReg(TempReg2).addReg(TempReg1);
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return DestReg;
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}
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return 0;
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}
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