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Add an insertPass API to TargetPassConfig. <rdar://problem/11498613>
Besides adding the new insertPass function, this patch uses it to enhance the existing -print-machineinstrs so that the MachineInstrs after a specific pass can be printed. Patch by Bin Zeng! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157655 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -101,6 +101,9 @@ public:
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/// point where StadardID is expected, add TargetID in its place.
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/// point where StadardID is expected, add TargetID in its place.
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void substitutePass(char &StandardID, char &TargetID);
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void substitutePass(char &StandardID, char &TargetID);
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/// Insert InsertedPassID pass after TargetPassID pass.
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void insertPass(const char &TargetPassID, const char &InsertedPassID);
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/// Allow the target to enable a specific standard pass by default.
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/// Allow the target to enable a specific standard pass by default.
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void enablePass(char &ID) { substitutePass(ID, ID); }
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void enablePass(char &ID) { substitutePass(ID, ID); }
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@ -342,6 +345,9 @@ namespace llvm {
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/// branches.
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/// branches.
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extern char &BranchFolderPassID;
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extern char &BranchFolderPassID;
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/// MachineFunctionPrinterPass - This pass prints out MachineInstr's.
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extern char &MachineFunctionPrinterPassID;
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/// TailDuplicate - Duplicate blocks with unconditional branches
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/// TailDuplicate - Duplicate blocks with unconditional branches
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/// into tails of their predecessors.
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/// into tails of their predecessors.
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extern char &TailDuplicateID;
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extern char &TailDuplicateID;
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@ -252,6 +252,7 @@ void initializeInstSimplifierPass(PassRegistry&);
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void initializeUnpackMachineBundlesPass(PassRegistry&);
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void initializeUnpackMachineBundlesPass(PassRegistry&);
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void initializeFinalizeMachineBundlesPass(PassRegistry&);
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void initializeFinalizeMachineBundlesPass(PassRegistry&);
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void initializeBBVectorizePass(PassRegistry&);
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void initializeBBVectorizePass(PassRegistry&);
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void initializeMachineFunctionPrinterPassPass(PassRegistry&);
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}
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}
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#endif
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#endif
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@ -66,6 +66,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
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initializeUnreachableMachineBlockElimPass(Registry);
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initializeUnreachableMachineBlockElimPass(Registry);
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initializeVirtRegMapPass(Registry);
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initializeVirtRegMapPass(Registry);
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initializeLowerIntrinsicsPass(Registry);
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initializeLowerIntrinsicsPass(Registry);
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initializeMachineFunctionPrinterPassPass(Registry);
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}
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}
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void LLVMInitializeCodeGen(LLVMPassRegistryRef R) {
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void LLVMInitializeCodeGen(LLVMPassRegistryRef R) {
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@ -15,6 +15,7 @@
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Support/Debug.h"
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using namespace llvm;
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using namespace llvm;
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@ -28,6 +29,7 @@ struct MachineFunctionPrinterPass : public MachineFunctionPass {
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raw_ostream &OS;
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raw_ostream &OS;
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const std::string Banner;
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const std::string Banner;
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MachineFunctionPrinterPass() : MachineFunctionPass(ID), OS(dbgs()) { }
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MachineFunctionPrinterPass(raw_ostream &os, const std::string &banner)
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MachineFunctionPrinterPass(raw_ostream &os, const std::string &banner)
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: MachineFunctionPass(ID), OS(os), Banner(banner) {}
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: MachineFunctionPass(ID), OS(os), Banner(banner) {}
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@ -48,6 +50,10 @@ struct MachineFunctionPrinterPass : public MachineFunctionPass {
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char MachineFunctionPrinterPass::ID = 0;
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char MachineFunctionPrinterPass::ID = 0;
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}
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}
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char &MachineFunctionPrinterPassID = MachineFunctionPrinterPass::ID;
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INITIALIZE_PASS(MachineFunctionPrinterPass, "print-machineinstrs",
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"Machine Function Printer", false, false)
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namespace llvm {
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namespace llvm {
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/// Returns a newly-created MachineFunction Printer pass. The
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/// Returns a newly-created MachineFunction Printer pass. The
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/// default banner is empty.
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/// default banner is empty.
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@ -80,6 +80,10 @@ static cl::opt<bool> PrintGCInfo("print-gc", cl::Hidden,
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static cl::opt<bool> VerifyMachineCode("verify-machineinstrs", cl::Hidden,
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static cl::opt<bool> VerifyMachineCode("verify-machineinstrs", cl::Hidden,
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cl::desc("Verify generated machine code"),
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cl::desc("Verify generated machine code"),
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cl::init(getenv("LLVM_VERIFY_MACHINEINSTRS")!=NULL));
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cl::init(getenv("LLVM_VERIFY_MACHINEINSTRS")!=NULL));
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static cl::opt<std::string>
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PrintMachineInstrs("print-machineinstrs", cl::ValueOptional,
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cl::desc("Print machine instrs"),
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cl::value_desc("pass-name"), cl::init("option-unspecified"));
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/// Allow standard passes to be disabled by command line options. This supports
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/// Allow standard passes to be disabled by command line options. This supports
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/// simple binary flags that either suppress the pass or do nothing.
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/// simple binary flags that either suppress the pass or do nothing.
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@ -196,6 +200,10 @@ public:
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// default by substituting NoPass, and the user may still enable that standard
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// default by substituting NoPass, and the user may still enable that standard
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// pass with an explicit command line option.
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// pass with an explicit command line option.
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DenseMap<AnalysisID,AnalysisID> TargetPasses;
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DenseMap<AnalysisID,AnalysisID> TargetPasses;
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/// Store the pairs of <AnalysisID, AnalysisID> of which the second pass
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/// is inserted after each instance of the first one.
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SmallVector<std::pair<AnalysisID, AnalysisID>, 4> InsertedPasses;
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};
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};
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} // namespace llvm
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} // namespace llvm
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@ -225,6 +233,14 @@ TargetPassConfig::TargetPassConfig(TargetMachine *tm, PassManagerBase &pm)
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substitutePass(MachineSchedulerID, NoPassID);
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substitutePass(MachineSchedulerID, NoPassID);
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}
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}
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/// Insert InsertedPassID pass after TargetPassID.
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void TargetPassConfig::insertPass(const char &TargetPassID,
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const char &InsertedPassID) {
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assert(&TargetPassID != &InsertedPassID && "Insert a pass after itself!");
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std::pair<AnalysisID, AnalysisID> P(&TargetPassID, &InsertedPassID);
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Impl->InsertedPasses.push_back(P);
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}
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/// createPassConfig - Create a pass configuration object to be used by
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/// createPassConfig - Create a pass configuration object to be used by
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/// addPassToEmitX methods for generating a pipeline of CodeGen passes.
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/// addPassToEmitX methods for generating a pipeline of CodeGen passes.
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///
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///
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@ -270,6 +286,17 @@ AnalysisID TargetPassConfig::addPass(char &ID) {
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if (!P)
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if (!P)
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llvm_unreachable("Pass ID not registered");
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llvm_unreachable("Pass ID not registered");
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PM->add(P);
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PM->add(P);
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// Add the passes after the pass P if there is any.
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for (SmallVector<std::pair<AnalysisID, AnalysisID>, 4>::iterator
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I = Impl->InsertedPasses.begin(), E = Impl->InsertedPasses.end();
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I != E; ++I) {
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if ((*I).first == &ID) {
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assert((*I).second && "Illegal Pass ID!");
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Pass *NP = Pass::createPass((*I).second);
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assert(NP && "Pass ID not registered");
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PM->add(NP);
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}
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}
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return FinalID;
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return FinalID;
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}
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}
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@ -352,6 +379,21 @@ void TargetPassConfig::addMachinePasses() {
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// Print the instruction selected machine code...
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// Print the instruction selected machine code...
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printAndVerify("After Instruction Selection");
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printAndVerify("After Instruction Selection");
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// Insert a machine instr printer pass after the specified pass.
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// If -print-machineinstrs specified, print machineinstrs after all passes.
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if (StringRef(PrintMachineInstrs.getValue()).equals(""))
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TM->Options.PrintMachineCode = true;
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else if (!StringRef(PrintMachineInstrs.getValue())
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.equals("option-unspecified")) {
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const PassRegistry *PR = PassRegistry::getPassRegistry();
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const PassInfo *TPI = PR->getPassInfo(PrintMachineInstrs.getValue());
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const PassInfo *IPI = PR->getPassInfo(StringRef("print-machineinstrs"));
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assert (TPI && IPI && "Pass ID not registered!");
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const char *TID = (char *)(TPI->getTypeInfo());
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const char *IID = (char *)(IPI->getTypeInfo());
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insertPass(*TID, *IID);
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}
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// Expand pseudo-instructions emitted by ISel.
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// Expand pseudo-instructions emitted by ISel.
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addPass(ExpandISelPseudosID);
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addPass(ExpandISelPseudosID);
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14
test/CodeGen/Generic/print-machineinstrs.ll
Normal file
14
test/CodeGen/Generic/print-machineinstrs.ll
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@ -0,0 +1,14 @@
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; RUN: llc < %s -O3 -debug-pass=Structure -print-machineinstrs=branch-folder -o /dev/null |& FileCheck %s
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; RUN: llc < %s -O3 -debug-pass=Structure -print-machineinstrs -o /dev/null |& FileCheck %s
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; RUN: llc < %s -O3 -debug-pass=Structure -print-machineinstrs= -o /dev/null |& FileCheck %s
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define i64 @foo(i64 %a, i64 %b) nounwind {
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; CHECK: -branch-folder -print-machineinstrs
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; CHECK: Control Flow Optimizer
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; CHECK-NEXT: MachineFunction Printer
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; CHECK: Machine code for function foo:
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%c = add i64 %a, %b
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%d = trunc i64 %c to i32
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%e = zext i32 %d to i64
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ret i64 %e
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}
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@ -145,11 +145,6 @@ EnableFPMAD("enable-fp-mad",
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cl::desc("Enable less precise MAD instructions to be generated"),
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cl::desc("Enable less precise MAD instructions to be generated"),
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cl::init(false));
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cl::init(false));
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static cl::opt<bool>
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PrintCode("print-machineinstrs",
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cl::desc("Print generated machine code"),
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cl::init(false));
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static cl::opt<bool>
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static cl::opt<bool>
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DisableFPElim("disable-fp-elim",
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DisableFPElim("disable-fp-elim",
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cl::desc("Disable frame pointer elimination optimization"),
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cl::desc("Disable frame pointer elimination optimization"),
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@ -403,7 +398,6 @@ int main(int argc, char **argv) {
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TargetOptions Options;
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TargetOptions Options;
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Options.LessPreciseFPMADOption = EnableFPMAD;
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Options.LessPreciseFPMADOption = EnableFPMAD;
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Options.PrintMachineCode = PrintCode;
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Options.NoFramePointerElim = DisableFPElim;
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Options.NoFramePointerElim = DisableFPElim;
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Options.NoFramePointerElimNonLeaf = DisableFPElimNonLeaf;
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Options.NoFramePointerElimNonLeaf = DisableFPElimNonLeaf;
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Options.NoExcessFPPrecision = DisableExcessPrecision;
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Options.NoExcessFPPrecision = DisableExcessPrecision;
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