6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-09-24 23:28:41 +00:00
Code Issues Projects Releases Wiki Activity

Removed VNInfo::isDefAccurate(). Def "accuracy" can be checked by testing whether LiveIntervals::getInstructionFromIndex(def) returns NULL.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114791 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Lang Hames
2010-09-25 12:04:16 +00:00
parent 8db2defa83
commit 6e2968c85c
11 changed files with 78 additions and 104 deletions
Download Patch File Download Diff File Expand all files Collapse all files

38
lib/CodeGen/LiveIntervalAnalysis.cpp
View File

@@ -285,8 +285,8 @@ bool LiveIntervals::isPartialRedef(SlotIndex MIIdx, MachineOperand &MO,
SlotIndex RedefIndex = MIIdx.getDefIndex();
const LiveRange *OldLR =
interval.getLiveRangeContaining(RedefIndex.getUseIndex());
if (OldLR->valno->isDefAccurate()) {
MachineInstr *DefMI = getInstructionFromIndex(OldLR->valno->def);
MachineInstr *DefMI = getInstructionFromIndex(OldLR->valno->def);
if (DefMI != 0) {
return DefMI->findRegisterDefOperandIdx(interval.reg) != -1;
}
return false;
@@ -326,8 +326,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
CopyMI = mi;
}
VNInfo *ValNo = interval.getNextValue(defIndex, CopyMI, true,
VNInfoAllocator);
VNInfo *ValNo = interval.getNextValue(defIndex, CopyMI, VNInfoAllocator);
assert(ValNo->id == 0 && "First value in interval is not 0?");
// Loop over all of the blocks that the vreg is defined in. There are
@@ -393,7 +392,9 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
// Create interval with one of a NEW value number. Note that this value
// number isn't actually defined by an instruction, weird huh? :)
if (PHIJoin) {
ValNo = interval.getNextValue(Start, 0, false, VNInfoAllocator);
assert(getInstructionFromIndex(Start) == 0 &&
"PHI def index points at actual instruction.");
ValNo = interval.getNextValue(Start, 0, VNInfoAllocator);
ValNo->setIsPHIDef(true);
}
LiveRange LR(Start, killIdx, ValNo);
@@ -439,10 +440,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
// The new value number (#1) is defined by the instruction we claimed
// defined value #0.
VNInfo *ValNo = interval.getNextValue(OldValNo->def, OldValNo->getCopy(),
false, // update at *
VNInfoAllocator);
ValNo->setFlags(OldValNo->getFlags()); // * <- updating here
VNInfo *ValNo = interval.createValueCopy(OldValNo, VNInfoAllocator);
// Value#0 is now defined by the 2-addr instruction.
OldValNo->def = RedefIndex;
@@ -480,7 +478,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
MachineInstr *CopyMI = NULL;
if (mi->isCopyLike())
CopyMI = mi;
ValNo = interval.getNextValue(defIndex, CopyMI, true, VNInfoAllocator);
ValNo = interval.getNextValue(defIndex, CopyMI, VNInfoAllocator);
SlotIndex killIndex = getMBBEndIdx(mbb);
LiveRange LR(defIndex, killIndex, ValNo);
@@ -575,7 +573,7 @@ exit:
LiveInterval::iterator OldLR = interval.FindLiveRangeContaining(start);
bool Extend = OldLR != interval.end();
VNInfo *ValNo = Extend
? OldLR->valno : interval.getNextValue(start, CopyMI, true, VNInfoAllocator);
? OldLR->valno : interval.getNextValue(start, CopyMI, VNInfoAllocator);
if (MO.isEarlyClobber() && Extend)
ValNo->setHasRedefByEC(true);
LiveRange LR(start, end, ValNo);
@@ -671,8 +669,11 @@ void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB,
}
}
SlotIndex defIdx = getMBBStartIdx(MBB);
assert(getInstructionFromIndex(defIdx) == 0 &&
"PHI def index points at actual instruction.");
VNInfo *vni =
interval.getNextValue(getMBBStartIdx(MBB), 0, false, VNInfoAllocator);
interval.getNextValue(defIdx, 0, VNInfoAllocator);
vni->setIsPHIDef(true);
LiveRange LR(start, end, vni);
@@ -863,9 +864,9 @@ bool LiveIntervals::isReMaterializable(const LiveInterval &li,
if (VNI->isUnused())
continue; // Dead val#.
// Is the def for the val# rematerializable?
if (!VNI->isDefAccurate())
return false;
MachineInstr *ReMatDefMI = getInstructionFromIndex(VNI->def);
if (!ReMatDefMI)
return false;
bool DefIsLoad = false;
if (!ReMatDefMI ||
!isReMaterializable(li, VNI, ReMatDefMI, SpillIs, DefIsLoad))
@@ -1188,7 +1189,7 @@ rewriteInstructionForSpills(const LiveInterval &li, const VNInfo *VNI,
if (HasUse) {
if (CreatedNewVReg) {
LiveRange LR(index.getLoadIndex(), index.getDefIndex(),
nI.getNextValue(SlotIndex(), 0, false, VNInfoAllocator));
nI.getNextValue(SlotIndex(), 0, VNInfoAllocator));
DEBUG(dbgs() << " +" << LR);
nI.addRange(LR);
} else {
@@ -1202,7 +1203,7 @@ rewriteInstructionForSpills(const LiveInterval &li, const VNInfo *VNI,
}
if (HasDef) {
LiveRange LR(index.getDefIndex(), index.getStoreIndex(),
nI.getNextValue(SlotIndex(), 0, false, VNInfoAllocator));
nI.getNextValue(SlotIndex(), 0, VNInfoAllocator));
DEBUG(dbgs() << " +" << LR);
nI.addRange(LR);
}
@@ -1651,8 +1652,7 @@ addIntervalsForSpills(const LiveInterval &li,
if (VNI->isUnused())
continue; // Dead val#.
// Is the def for the val# rematerializable?
MachineInstr *ReMatDefMI = VNI->isDefAccurate()
? getInstructionFromIndex(VNI->def) : 0;
MachineInstr *ReMatDefMI = getInstructionFromIndex(VNI->def);
bool dummy;
if (ReMatDefMI && isReMaterializable(li, VNI, ReMatDefMI, SpillIs, dummy)) {
// Remember how to remat the def of this val#.
@@ -1994,7 +1994,7 @@ LiveRange LiveIntervals::addLiveRangeToEndOfBlock(unsigned reg,
LiveInterval& Interval = getOrCreateInterval(reg);
VNInfo* VN = Interval.getNextValue(
SlotIndex(getInstructionIndex(startInst).getDefIndex()),
startInst, true, getVNInfoAllocator());
startInst, getVNInfoAllocator());
VN->setHasPHIKill(true);
LiveRange LR(
SlotIndex(getInstructionIndex(startInst).getDefIndex()),