diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp index 2e09d379c48..d078bdcd5f0 100644 --- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -844,14 +844,6 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) { case ISD::CALL: return SelectCALL(Op); case ISD::TAILCALL: return SelectCALL(Op); - case ISD::UNDEF: - if (N->getValueType(0) == MVT::i32) - CurDAG->SelectNodeTo(N, PPC::IMPLICIT_DEF_GPR, MVT::i32); - else if (N->getValueType(0) == MVT::f32) - CurDAG->SelectNodeTo(N, PPC::IMPLICIT_DEF_F4, MVT::f32); - else - CurDAG->SelectNodeTo(N, PPC::IMPLICIT_DEF_F8, MVT::f64); - return SDOperand(N, 0); case ISD::FrameIndex: { int FI = cast(N)->getIndex(); if (N->hasOneUse()) { diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index ad16835f914..e858440f35d 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -153,9 +153,12 @@ let isLoad = 1 in { def ADJCALLSTACKDOWN : Pseudo<(ops u16imm:$amt), "; ADJCALLSTACKDOWN", []>; def ADJCALLSTACKUP : Pseudo<(ops u16imm:$amt), "; ADJCALLSTACKUP", []>; } -def IMPLICIT_DEF_GPR : Pseudo<(ops GPRC:$rD), "; $rD = IMPLICIT_DEF_GPRC", []>; -def IMPLICIT_DEF_F8 : Pseudo<(ops F8RC:$rD), "; %rD = IMPLICIT_DEF_F8", []>; -def IMPLICIT_DEF_F4 : Pseudo<(ops F4RC:$rD), "; %rD = IMPLICIT_DEF_F4", []>; +def IMPLICIT_DEF_GPR : Pseudo<(ops GPRC:$rD), "; $rD = IMPLICIT_DEF_GPRC", + [(set GPRC:$rD, (undef))]>; +def IMPLICIT_DEF_F8 : Pseudo<(ops F8RC:$rD), "; %rD = IMPLICIT_DEF_F8", + [(set F8RC:$rD, (undef))]>; +def IMPLICIT_DEF_F4 : Pseudo<(ops F4RC:$rD), "; %rD = IMPLICIT_DEF_F4", + [(set F4RC:$rD, (undef))]>; // SELECT_CC_* - Used to implement the SELECT_CC DAG operation. Expanded by the // scheduler into a branch sequence.