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AArch64/ARM64: produce more informative diagnostic assembling some immediates

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No tests here, they'll be added when the entire neon-diagnostics.s test from
AArch64 is enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208079 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover 2014-05-06 11:18:53 +00:00
parent 80fd09110d
commit 6e64f90dc5
4 changed files with 56 additions and 50 deletions
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32
lib/Target/ARM64/ARM64InstrFormats.td
View File

@ -225,23 +225,16 @@ def imm0_65535 : Operand<i32>, ImmLeaf<i32, [{
let PrintMethod = "printHexImm";
}
def Imm1_8Operand : AsmOperandClass {
let Name = "Imm1_8";
let DiagnosticType = "InvalidImm1_8";
}
def Imm1_16Operand : AsmOperandClass {
let Name = "Imm1_16";
let DiagnosticType = "InvalidImm1_16";
}
def Imm1_32Operand : AsmOperandClass {
let Name = "Imm1_32";
let DiagnosticType = "InvalidImm1_32";
}
def Imm1_64Operand : AsmOperandClass {
let Name = "Imm1_64";
let DiagnosticType = "InvalidImm1_64";
class AsmImmRange<int Low, int High> : AsmOperandClass {
let Name = "Imm" # Low # "_" # High;
let DiagnosticType = "InvalidImm" # Low # "_" # High;
}
def Imm1_8Operand : AsmImmRange<1, 8>;
def Imm1_16Operand : AsmImmRange<1, 16>;
def Imm1_32Operand : AsmImmRange<1, 32>;
def Imm1_64Operand : AsmImmRange<1, 64>;
def MovZSymbolG3AsmOperand : AsmOperandClass {
let Name = "MovZSymbolG3";
let RenderMethod = "addImmOperands";
@ -386,10 +379,10 @@ def vecshiftR64Narrow : Operand<i32>, ImmLeaf<i32, [{
let ParserMatchClass = Imm1_32Operand;
}
def Imm0_7Operand : AsmOperandClass { let Name = "Imm0_7"; }
def Imm0_15Operand : AsmOperandClass { let Name = "Imm0_15"; }
def Imm0_31Operand : AsmOperandClass { let Name = "Imm0_31"; }
def Imm0_63Operand : AsmOperandClass { let Name = "Imm0_63"; }
def Imm0_7Operand : AsmImmRange<0, 7>;
def Imm0_15Operand : AsmImmRange<0, 15>;
def Imm0_31Operand : AsmImmRange<0, 31>;
def Imm0_63Operand : AsmImmRange<0, 63>;
def vecshiftL8 : Operand<i32>, ImmLeaf<i32, [{
return (((uint32_t)Imm) < 8);
@ -4473,6 +4466,7 @@ multiclass SIMDCmpTwoVector<bit U, bits<5> opc, string asm,
// FP Comparisons support only S and D element sizes.
multiclass SIMDFPCmpTwoVector<bit U, bit S, bits<5> opc,
string asm, SDNode OpNode> {
def v2i32rz : BaseSIMDCmpTwoVector<0, U, {S,0}, opc, V64,
asm, ".2s", "0.0",
v2i32, v2f32, OpNode>;

38
lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp
View File

@ -3852,31 +3852,39 @@ bool ARM64AsmParser::showMatchError(SMLoc Loc, unsigned ErrCode) {
case Match_InvalidSuffix:
return Error(Loc, "invalid type suffix for instruction");
case Match_InvalidMemoryIndexedSImm9:
return Error(Loc, "index must be an integer in range [-256,255].");
return Error(Loc, "index must be an integer in range [-256, 255].");
case Match_InvalidMemoryIndexed32SImm7:
return Error(Loc, "index must be a multiple of 4 in range [-256,252].");
return Error(Loc, "index must be a multiple of 4 in range [-256, 252].");
case Match_InvalidMemoryIndexed64SImm7:
return Error(Loc, "index must be a multiple of 8 in range [-512,504].");
return Error(Loc, "index must be a multiple of 8 in range [-512, 504].");
case Match_InvalidMemoryIndexed128SImm7:
return Error(Loc, "index must be a multiple of 16 in range [-1024,1008].");
return Error(Loc, "index must be a multiple of 16 in range [-1024, 1008].");
case Match_InvalidMemoryIndexed8:
return Error(Loc, "index must be an integer in range [0,4095].");
return Error(Loc, "index must be an integer in range [0, 4095].");
case Match_InvalidMemoryIndexed16:
return Error(Loc, "index must be a multiple of 2 in range [0,8190].");
return Error(Loc, "index must be a multiple of 2 in range [0, 8190].");
case Match_InvalidMemoryIndexed32:
return Error(Loc, "index must be a multiple of 4 in range [0,16380].");
return Error(Loc, "index must be a multiple of 4 in range [0, 16380].");
case Match_InvalidMemoryIndexed64:
return Error(Loc, "index must be a multiple of 8 in range [0,32760].");
return Error(Loc, "index must be a multiple of 8 in range [0, 32760].");
case Match_InvalidMemoryIndexed128:
return Error(Loc, "index must be a multiple of 16 in range [0,65520].");
return Error(Loc, "index must be a multiple of 16 in range [0, 65520].");
case Match_InvalidImm0_7:
return Error(Loc, "immediate must be an integer in range [0, 7].");
case Match_InvalidImm0_15:
return Error(Loc, "immediate must be an integer in range [0, 15].");
case Match_InvalidImm0_31:
return Error(Loc, "immediate must be an integer in range [0, 31].");
case Match_InvalidImm0_63:
return Error(Loc, "immediate must be an integer in range [0, 63].");
case Match_InvalidImm1_8:
return Error(Loc, "immediate must be an integer in range [1,8].");
return Error(Loc, "immediate must be an integer in range [1, 8].");
case Match_InvalidImm1_16:
return Error(Loc, "immediate must be an integer in range [1,16].");
return Error(Loc, "immediate must be an integer in range [1, 16].");
case Match_InvalidImm1_32:
return Error(Loc, "immediate must be an integer in range [1,32].");
return Error(Loc, "immediate must be an integer in range [1, 32].");
case Match_InvalidImm1_64:
return Error(Loc, "immediate must be an integer in range [1,64].");
return Error(Loc, "immediate must be an integer in range [1, 64].");
case Match_InvalidLabel:
return Error(Loc, "expected label or encodable integer pc offset");
case Match_MRS:
@ -4416,6 +4424,10 @@ bool ARM64AsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
case Match_InvalidMemoryIndexed32SImm7:
case Match_InvalidMemoryIndexed64SImm7:
case Match_InvalidMemoryIndexed128SImm7:
case Match_InvalidImm0_7:
case Match_InvalidImm0_15:
case Match_InvalidImm0_31:
case Match_InvalidImm0_63:
case Match_InvalidImm1_8:
case Match_InvalidImm1_16:
case Match_InvalidImm1_32:

34
test/MC/ARM64/diags.s
View File

@ -33,43 +33,43 @@ foo:
ldur x0, [x1, #-257]
; CHECK-ERRORS: error: index must be a multiple of 8 in range [0,32760].
; CHECK-ERRORS: error: index must be a multiple of 8 in range [0, 32760].
; CHECK-ERRORS: ldr x0, [x0, #804]
; CHECK-ERRORS: ^
; CHECK-ERRORS: error: index must be a multiple of 4 in range [0,16380].
; CHECK-ERRORS: error: index must be a multiple of 4 in range [0, 16380].
; CHECK-ERRORS: ldr w0, [x0, #802]
; CHECK-ERRORS: ^
; CHECK-ERRORS: error: index must be an integer in range [-256,255].
; CHECK-ERRORS: error: index must be an integer in range [-256, 255].
; CHECK-ERRORS: ldr x0, [x0, #804]!
; CHECK-ERRORS: ^
; CHECK-ERRORS: error: index must be an integer in range [-256,255].
; CHECK-ERRORS: error: index must be an integer in range [-256, 255].
; CHECK-ERRORS: ldr w0, [w0, #301]!
; CHECK-ERRORS: ^
; CHECK-ERRORS: error: index must be an integer in range [-256,255].
; CHECK-ERRORS: error: index must be an integer in range [-256, 255].
; CHECK-ERRORS: ldr x0, [x0], #804
; CHECK-ERRORS: ^
; CHECK-ERRORS: error: index must be an integer in range [-256,255].
; CHECK-ERRORS: error: index must be an integer in range [-256, 255].
; CHECK-ERRORS: ldr w0, [w0], #301
; CHECK-ERRORS: ^
; CHECK-ERRORS: error: index must be a multiple of 4 in range [-256,252].
; CHECK-ERRORS: error: index must be a multiple of 4 in range [-256, 252].
; CHECK-ERRORS: ldp w3, w4, [x5, #11]!
; CHECK-ERRORS: ^
; CHECK-ERRORS: error: index must be a multiple of 8 in range [-512,504].
; CHECK-ERRORS: error: index must be a multiple of 8 in range [-512, 504].
; CHECK-ERRORS: ldp x3, x4, [x5, #12]!
; CHECK-ERRORS: ^
; CHECK-ERRORS: error: index must be a multiple of 16 in range [-1024,1008].
; CHECK-ERRORS: error: index must be a multiple of 16 in range [-1024, 1008].
; CHECK-ERRORS: ldp q3, q4, [x5, #12]!
; CHECK-ERRORS: ^
; CHECK-ERRORS: error: index must be a multiple of 4 in range [-256,252].
; CHECK-ERRORS: error: index must be a multiple of 4 in range [-256, 252].
; CHECK-ERRORS: ldp w3, w4, [x5], #11
; CHECK-ERRORS: ^
; CHECK-ERRORS: error: index must be a multiple of 8 in range [-512,504].
; CHECK-ERRORS: error: index must be a multiple of 8 in range [-512, 504].
; CHECK-ERRORS: ldp x3, x4, [x5], #12
; CHECK-ERRORS: ^
; CHECK-ERRORS: error: index must be a multiple of 8 in range [-512,504].
; CHECK-ERRORS: error: index must be a multiple of 8 in range [-512, 504].
; CHECK-ERRORS: ldp q3, q4, [x5], #12
; CHECK-ERRORS: ^
; CHECK-ERRORS: error: index must be an integer in range [-256,255].
; CHECK-ERRORS: error: index must be an integer in range [-256, 255].
; CHECK-ERRORS: ldur x0, [x1, #-257]
; CHECK-ERRORS: ^
@ -93,16 +93,16 @@ foo:
sqrshrn v7.4h, v8.4s, #39
uqshrn2 v4.4s, v5.2d, #67
; CHECK-ERRORS: error: immediate must be an integer in range [1,8].
; CHECK-ERRORS: error: immediate must be an integer in range [1, 8].
; CHECK-ERRORS: sqrshrn b4, h9, #10
; CHECK-ERRORS: ^
; CHECK-ERRORS: error: immediate must be an integer in range [1,8].
; CHECK-ERRORS: error: immediate must be an integer in range [1, 8].
; CHECK-ERRORS: rshrn v9.8b, v11.8h, #17
; CHECK-ERRORS: ^
; CHECK-ERRORS: error: immediate must be an integer in range [1,16].
; CHECK-ERRORS: error: immediate must be an integer in range [1, 16].
; CHECK-ERRORS: sqrshrn v7.4h, v8.4s, #39
; CHECK-ERRORS: ^
; CHECK-ERRORS: error: immediate must be an integer in range [1,32].
; CHECK-ERRORS: error: immediate must be an integer in range [1, 32].
; CHECK-ERRORS: uqshrn2 v4.4s, v5.2d, #67
; CHECK-ERRORS: ^

2
test/MC/ARM64/spsel-sysreg.s
View File

@ -19,6 +19,6 @@ mrs x0, ESR_EL1
msr DAIFSet, x0
msr ESR_EL1, #0
mrs x0, DAIFSet
// CHECK-ERRORS: error: expected writable system register or pstate
// CHECK-ERRORS: error: immediate must be an integer in range [0, 15]
// CHECK-ERRORS: error: invalid operand for instruction
// CHECK-ERRORS: error: expected readable system register