diff --git a/include/llvm/IR/InlineAsm.h b/include/llvm/IR/InlineAsm.h index e94323a24d7..ea3708d4635 100644 --- a/include/llvm/IR/InlineAsm.h +++ b/include/llvm/IR/InlineAsm.h @@ -240,8 +240,8 @@ public: // constraint codes for all targets. Constraint_Unknown = 0, Constraint_m, - Constraint_o, // Unused at the moment since Constraint_m is always used. - Constraint_v, // Unused at the moment since Constraint_m is always used. + Constraint_o, + Constraint_v, Constraints_Max = Constraint_v, Constraints_ShiftAmount = 16, diff --git a/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp b/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp index 795faf97af4..d746df98cdc 100644 --- a/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp +++ b/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp @@ -1108,11 +1108,11 @@ SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, SDValue Inp = Op, Res; switch (ConstraintID) { - case InlineAsm::Constraint_o: // Offsetable. - case InlineAsm::Constraint_v: // Not offsetable. default: return true; - case InlineAsm::Constraint_m: // Memory. + case InlineAsm::Constraint_o: // Offsetable. + case InlineAsm::Constraint_v: // Not offsetable. + case InlineAsm::Constraint_m: // Memory. if (SelectAddrFI(Inp, Res)) OutOps.push_back(Res); else diff --git a/lib/Target/Hexagon/HexagonISelLowering.h b/lib/Target/Hexagon/HexagonISelLowering.h index 7b772f07eb0..99214c8d445 100644 --- a/lib/Target/Hexagon/HexagonISelLowering.h +++ b/lib/Target/Hexagon/HexagonISelLowering.h @@ -185,8 +185,11 @@ bool isPositiveHalfWord(SDNode *N); unsigned getInlineAsmMemConstraint( const std::string &ConstraintCode) const override { - // FIXME: Map different constraints differently. - return InlineAsm::Constraint_m; + if (ConstraintCode == "o") + return InlineAsm::Constraint_o; + else if (ConstraintCode == "v") + return InlineAsm::Constraint_v; + return TargetLowering::getInlineAsmMemConstraint(ConstraintCode); } // Intrinsics