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Rename MRegisterInfo to TargetRegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -44,7 +44,7 @@ namespace {
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private:
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MachineFunction *MF;
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const TargetMachine *TM;
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const MRegisterInfo *MRI;
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const TargetRegisterInfo *TRI;
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// StackSlotForVirtReg - Maps SSA Regs => frame index on the stack where
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// these values are spilled
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@@ -169,7 +169,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
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// Made to combat the incorrect allocation of r2 = add r1, r1
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std::map<unsigned, unsigned> Virt2PhysRegMap;
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RegsUsed.resize(MRI->getNumRegs());
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RegsUsed.resize(TRI->getNumRegs());
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// This is a preliminary pass that will invalidate any registers that are
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// used by the instruction (including implicit uses).
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@@ -192,7 +192,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
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MachineOperand &op = MI->getOperand(i);
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if (op.isRegister() && op.getReg() &&
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MRegisterInfo::isVirtualRegister(op.getReg())) {
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TargetRegisterInfo::isVirtualRegister(op.getReg())) {
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unsigned virtualReg = (unsigned) op.getReg();
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DOUT << "op: " << op << "\n";
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DOUT << "\t inst[" << i << "]: ";
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@@ -239,7 +239,7 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
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DOUT << "Machine Function\n";
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MF = &Fn;
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TM = &MF->getTarget();
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MRI = TM->getRegisterInfo();
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TRI = TM->getRegisterInfo();
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// Loop over all of the basic blocks, eliminating virtual register references
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for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
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