change the protocol TargetAsmPArser::MatchInstruction method to take an

MCStreamer to emit into instead of an MCInst to fill in.  This allows the
matcher extra flexibility and is more convenient.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115014 91177308-0d34-0410-b5e6-96231b3b80d8

include/llvm/Target/TargetAsmParser.h

@@ -13,7 +13,7 @@
 #include "llvm/MC/MCParser/MCAsmParserExtension.h"
 
 namespace llvm {
-class MCInst;
+class MCStreamer;
 class StringRef;
 class Target;
 class SMLoc;
@@ -70,16 +70,16 @@ public:
   /// \param DirectiveID - the identifier token of the directive.
   virtual bool ParseDirective(AsmToken DirectiveID) = 0;
   
-  /// MatchInstruction - Recognize a series of operands of a parsed instruction
-  /// as an actual MCInst.  This returns false and fills in Inst on success and
-  /// returns true on failure to match.
+  /// MatchAndEmitInstruction - Recognize a series of operands of a parsed
+  /// instruction as an actual MCInst and emit it to the specified MCStreamer.
+  /// This returns false on success and returns true on failure to match.
   ///
   /// On failure, the target parser is responsible for emitting a diagnostic
   /// explaining the match failure.
   virtual bool 
-  MatchInstruction(SMLoc IDLoc,
-                   const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
-                   MCInst &Inst) = 0;
+  MatchAndEmitInstruction(SMLoc IDLoc,
+                          const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
+                          MCStreamer &Out) = 0;
   
 };
 

lib/MC/MCParser/AsmParser.cpp

@@ -19,7 +19,6 @@
 #include "llvm/MC/MCAsmInfo.h"
 #include "llvm/MC/MCContext.h"
 #include "llvm/MC/MCExpr.h"
-#include "llvm/MC/MCInst.h"
 #include "llvm/MC/MCParser/AsmCond.h"
 #include "llvm/MC/MCParser/AsmLexer.h"
 #include "llvm/MC/MCParser/MCAsmParser.h"
@@ -1047,14 +1046,9 @@ bool AsmParser::ParseStatement() {
   }
 
   // If parsing succeeded, match the instruction.
-  if (!HadError) {
-    MCInst Inst;
-    if (!getTargetParser().MatchInstruction(IDLoc, ParsedOperands, Inst)) {
-      // Emit the instruction on success.
-      Out.EmitInstruction(Inst);
-    } else
-      HadError = true;
-  }
+  if (!HadError)
+    HadError = getTargetParser().MatchAndEmitInstruction(IDLoc, ParsedOperands,
+                                                         Out);
 
   // Free any parsed operands.
   for (unsigned i = 0, e = ParsedOperands.size(); i != e; ++i)

lib/Target/ARM/AsmParser/ARMAsmParser.cpp

@@ -80,16 +80,18 @@ private:
 
   bool ParseDirectiveSyntax(SMLoc L);
 
-  bool MatchInstruction(SMLoc IDLoc,
+  bool MatchAndEmitInstruction(SMLoc IDLoc,
                         const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
-                        MCInst &Inst) {
+                        MCStreamer &Out) {
+    MCInst Inst;
     unsigned ErrorInfo;
-    if (MatchInstructionImpl(Operands, Inst, ErrorInfo) == Match_Success)
+    if (MatchInstructionImpl(Operands, Inst, ErrorInfo) == Match_Success) {
+      Out.EmitInstruction(Inst);
       return false;
+    }
 
     // FIXME: We should give nicer diagnostics about the exact failure.
     Error(IDLoc, "unrecognized instruction");
-
     return true;
   }
 

lib/Target/X86/AsmParser/X86AsmParser.cpp

@@ -36,7 +36,7 @@ class X86ATTAsmParser : public TargetAsmParser {
 
 protected:
   unsigned Is64Bit : 1;
-
+  
 private:
   MCAsmParser &getParser() const { return Parser; }
 
@@ -51,9 +51,9 @@ private:
 
   bool ParseDirectiveWord(unsigned Size, SMLoc L);
 
-  bool MatchInstruction(SMLoc IDLoc,
-                        const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
-                        MCInst &Inst);
+  bool MatchAndEmitInstruction(SMLoc IDLoc,
+                           const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
+                               MCStreamer &Out);
 
   /// @name Auto-generated Matcher Functions
   /// {
@@ -66,7 +66,7 @@ private:
 public:
   X86ATTAsmParser(const Target &T, MCAsmParser &_Parser, TargetMachine &TM)
     : TargetAsmParser(T), Parser(_Parser), TM(TM) {
-
+      
     // Initialize the set of available features.
     setAvailableFeatures(ComputeAvailableFeatures(
                            &TM.getSubtarget<X86Subtarget>()));
@@ -1108,17 +1108,19 @@ bool X86ATTAsmParser::ParseDirectiveWord(unsigned Size, SMLoc L) {
 
 
 bool X86ATTAsmParser::
-MatchInstruction(SMLoc IDLoc,
-                 const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
-                 MCInst &Inst) {
+MatchAndEmitInstruction(SMLoc IDLoc,
+                        const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
+                        MCStreamer &Out) {
   assert(!Operands.empty() && "Unexpect empty operand list!");
 
   bool WasOriginallyInvalidOperand = false;
   unsigned OrigErrorInfo;
+  MCInst Inst;
   
   // First, try a direct match.
   switch (MatchInstructionImpl(Operands, Inst, OrigErrorInfo)) {
   case Match_Success:
+    Out.EmitInstruction(Inst);
     return false;
   case Match_MissingFeature:
     Error(IDLoc, "instruction requires a CPU feature not currently enabled");
@@ -1165,8 +1167,10 @@ MatchInstruction(SMLoc IDLoc,
   unsigned NumSuccessfulMatches =
     (MatchB == Match_Success) + (MatchW == Match_Success) +
     (MatchL == Match_Success) + (MatchQ == Match_Success);
-  if (NumSuccessfulMatches == 1)
+  if (NumSuccessfulMatches == 1) {
+    Out.EmitInstruction(Inst);
     return false;
+  }
 
   // Otherwise, the match failed, try to produce a decent error message.