diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 1c9fcc12933..603e7e4891f 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -2738,7 +2738,8 @@ TargetLowering::AsmOperandInfoVector TargetLowering::ParseConstraints( case 32: case 64: case 128: - OpTy = IntegerType::get(OpTy->getContext(), BitSize); + OpInfo.ConstraintVT = + EVT::getEVT(IntegerType::get(OpTy->getContext(), BitSize), true); break; } } else if (dyn_cast(OpTy)) { diff --git a/test/CodeGen/X86/complex-asm.ll b/test/CodeGen/X86/complex-asm.ll new file mode 100644 index 00000000000..49878b982db --- /dev/null +++ b/test/CodeGen/X86/complex-asm.ll @@ -0,0 +1,17 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin +; This formerly crashed. + +%0 = type { i64, i64 } + +define %0 @f() nounwind ssp { +entry: + %v = alloca %0, align 8 + call void asm sideeffect "", "=*r,r,r,0,~{dirflag},~{fpsr},~{flags}"(%0* %v, i32 0, i32 1, i128 undef) nounwind + %0 = getelementptr inbounds %0* %v, i64 0, i32 0 + %1 = load i64* %0, align 8 + %2 = getelementptr inbounds %0* %v, i64 0, i32 1 + %3 = load i64* %2, align 8 + %mrv4 = insertvalue %0 undef, i64 %1, 0 + %mrv5 = insertvalue %0 %mrv4, i64 %3, 1 + ret %0 %mrv5 +}