From 714554d70717c73e0542ca93df36fa78765f87af Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Thu, 16 Mar 2006 21:47:42 +0000 Subject: [PATCH] Added a way for TargetLowering to specify what values can be used as the scale component of the target addressing mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26802 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Target/TargetLowering.h | 37 +++++++++++++++++++------ lib/Target/PowerPC/PPCTargetMachine.cpp | 4 +-- lib/Target/X86/X86ISelLowering.cpp | 10 +++++++ lib/Target/X86/X86TargetMachine.cpp | 4 +-- 4 files changed, 42 insertions(+), 13 deletions(-) diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h index 0ec98a26c81..2f950b01a29 100644 --- a/include/llvm/Target/TargetLowering.h +++ b/include/llvm/Target/TargetLowering.h @@ -559,15 +559,6 @@ public: /// valid for the specified target constraint letter. virtual bool isOperandValidForConstraint(SDOperand Op, char ConstraintLetter); - //===--------------------------------------------------------------------===// - // Loop Strength Reduction hooks - // - - /// isLegalAddressImmediate - Return true if the integer value or GlobalValue - /// can be used as the offset of the target addressing mode. - virtual bool isLegalAddressImmediate(int64_t V) const; - virtual bool isLegalAddressImmediate(GlobalValue *GV) const; - //===--------------------------------------------------------------------===// // Scheduler hooks // @@ -580,6 +571,34 @@ public: virtual MachineBasicBlock *InsertAtEndOfBasicBlock(MachineInstr *MI, MachineBasicBlock *MBB); + //===--------------------------------------------------------------------===// + // Loop Strength Reduction hooks + // + + /// isLegalAddressImmediate - Return true if the integer value or GlobalValue + /// can be used as the offset of the target addressing mode. + virtual bool isLegalAddressImmediate(int64_t V) const; + virtual bool isLegalAddressImmediate(GlobalValue *GV) const; + + typedef std::vector::const_iterator legal_am_scale_iterator; + legal_am_scale_iterator legal_am_scale_begin() const { + return LegalAddressScales.begin(); + } + legal_am_scale_iterator legal_am_scale_end() const { + return LegalAddressScales.end(); + } + +protected: + /// addLegalAddressScale - Add a integer (> 1) value which can be used as + /// scale in the target addressing mode. Note: the ordering matters so the + /// least efficient ones should be entered first. + void addLegalAddressScale(unsigned Scale) { + LegalAddressScales.push_back(Scale); + } + +private: + std::vector LegalAddressScales; + private: TargetMachine &TM; const TargetData &TD; diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp index 041eddfd1b1..8985a4364f8 100644 --- a/lib/Target/PowerPC/PPCTargetMachine.cpp +++ b/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -84,7 +84,7 @@ bool PPCTargetMachine::addPassesToEmitFile(PassManager &PM, if (FileType != TargetMachine::AssemblyFile) return true; // Run loop strength reduction before anything else. - if (!Fast) PM.add(createLoopStrengthReducePass(1, &TLInfo)); + if (!Fast) PM.add(createLoopStrengthReducePass(&TLInfo)); // FIXME: Implement efficient support for garbage collection intrinsics. PM.add(createLowerGCPass()); @@ -138,7 +138,7 @@ void PPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) { TM.setRelocationModel(Reloc::DynamicNoPIC); // Run loop strength reduction before anything else. - PM.add(createLoopStrengthReducePass(1, TM.getTargetLowering())); + PM.add(createLoopStrengthReducePass(TM.getTargetLowering())); // FIXME: Implement efficient support for garbage collection intrinsics. PM.add(createLowerGCPass()); diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index bf0d6d8e56d..148c7f8af9f 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -49,6 +49,16 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM) setSchedulingPreference(SchedulingForRegPressure); setShiftAmountFlavor(Mask); // shl X, 32 == shl X, 0 setStackPointerRegisterToSaveRestore(X86::ESP); + + // Add legal addressing mode scale values. + addLegalAddressScale(8); + addLegalAddressScale(4); + addLegalAddressScale(2); + // Enter the ones which require both scale + index last. These are more + // expensive. + addLegalAddressScale(9); + addLegalAddressScale(5); + addLegalAddressScale(3); // Set up the register classes. addRegisterClass(MVT::i8, X86::R8RegisterClass); diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp index 2de8cc0b613..3d5a6f8ffe2 100644 --- a/lib/Target/X86/X86TargetMachine.cpp +++ b/lib/Target/X86/X86TargetMachine.cpp @@ -97,7 +97,7 @@ bool X86TargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out, FileType != TargetMachine::ObjectFile) return true; // Run loop strength reduction before anything else. - if (EnableX86LSR) PM.add(createLoopStrengthReducePass(1, &TLInfo)); + if (EnableX86LSR) PM.add(createLoopStrengthReducePass(&TLInfo)); // FIXME: Implement efficient support for garbage collection intrinsics. PM.add(createLowerGCPass()); @@ -166,7 +166,7 @@ void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) { // Run loop strength reduction before anything else. if (EnableX86LSR) - PM.add(createLoopStrengthReducePass(1, TM.getTargetLowering())); + PM.add(createLoopStrengthReducePass(TM.getTargetLowering())); // FIXME: Implement efficient support for garbage collection intrinsics. PM.add(createLowerGCPass());