mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-19 03:29:22 +00:00
SelectNodeTo now returns N. Use it instead of return N directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24549 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
parent
eb19e40efb
commit
71d3d50b4a
@ -661,25 +661,22 @@ SDOperand PPCDAGToDAGISel::SelectSETCC(SDOperand Op) {
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default: break;
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case ISD::SETEQ:
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Op = CurDAG->getTargetNode(PPC::CNTLZW, MVT::i32, Op);
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CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Op, getI32Imm(27),
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getI32Imm(5), getI32Imm(31));
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return SDOperand(N, 0);
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return CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Op, getI32Imm(27),
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getI32Imm(5), getI32Imm(31));
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case ISD::SETNE: {
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SDOperand AD = CurDAG->getTargetNode(PPC::ADDIC, MVT::i32, MVT::Flag,
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Op, getI32Imm(~0U));
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CurDAG->SelectNodeTo(N, PPC::SUBFE, MVT::i32, AD, Op, AD.getValue(1));
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return SDOperand(N, 0);
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return CurDAG->SelectNodeTo(N, PPC::SUBFE, MVT::i32, AD, Op,
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AD.getValue(1));
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}
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case ISD::SETLT:
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CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Op, getI32Imm(1),
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getI32Imm(31), getI32Imm(31));
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return SDOperand(N, 0);
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return CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Op, getI32Imm(1),
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getI32Imm(31), getI32Imm(31));
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case ISD::SETGT: {
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SDOperand T = CurDAG->getTargetNode(PPC::NEG, MVT::i32, Op);
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T = CurDAG->getTargetNode(PPC::ANDC, MVT::i32, T, Op);;
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CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, T, getI32Imm(1),
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getI32Imm(31), getI32Imm(31));
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return SDOperand(N, 0);
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return CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, T, getI32Imm(1),
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getI32Imm(31), getI32Imm(31));
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}
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}
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} else if (Imm == ~0U) { // setcc op, -1
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@ -689,31 +686,28 @@ SDOperand PPCDAGToDAGISel::SelectSETCC(SDOperand Op) {
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case ISD::SETEQ:
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Op = CurDAG->getTargetNode(PPC::ADDIC, MVT::i32, MVT::Flag,
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Op, getI32Imm(1));
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CurDAG->SelectNodeTo(N, PPC::ADDZE, MVT::i32,
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CurDAG->getTargetNode(PPC::LI, MVT::i32,
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getI32Imm(0)),
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Op.getValue(1));
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return SDOperand(N, 0);
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return CurDAG->SelectNodeTo(N, PPC::ADDZE, MVT::i32,
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CurDAG->getTargetNode(PPC::LI, MVT::i32,
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getI32Imm(0)),
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Op.getValue(1));
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case ISD::SETNE: {
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Op = CurDAG->getTargetNode(PPC::NOR, MVT::i32, Op, Op);
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SDOperand AD = CurDAG->getTargetNode(PPC::ADDIC, MVT::i32, MVT::Flag,
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Op, getI32Imm(~0U));
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CurDAG->SelectNodeTo(N, PPC::SUBFE, MVT::i32, AD, Op, AD.getValue(1));
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return SDOperand(N, 0);
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return CurDAG->SelectNodeTo(N, PPC::SUBFE, MVT::i32, AD, Op,
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AD.getValue(1));
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}
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case ISD::SETLT: {
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SDOperand AD = CurDAG->getTargetNode(PPC::ADDI, MVT::i32, Op,
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getI32Imm(1));
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SDOperand AN = CurDAG->getTargetNode(PPC::AND, MVT::i32, AD, Op);
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CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, AN, getI32Imm(1),
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getI32Imm(31), getI32Imm(31));
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return SDOperand(N, 0);
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return CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, AN, getI32Imm(1),
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getI32Imm(31), getI32Imm(31));
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}
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case ISD::SETGT:
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Op = CurDAG->getTargetNode(PPC::RLWINM, MVT::i32, Op, getI32Imm(1),
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getI32Imm(31), getI32Imm(31));
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CurDAG->SelectNodeTo(N, PPC::XORI, MVT::i32, Op, getI32Imm(1));
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return SDOperand(N, 0);
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return CurDAG->SelectNodeTo(N, PPC::XORI, MVT::i32, Op, getI32Imm(1));
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}
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}
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}
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@ -741,18 +735,16 @@ SDOperand PPCDAGToDAGISel::SelectSETCC(SDOperand Op) {
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IntCR = CurDAG->getTargetNode(PPC::MFCR, MVT::i32, CCReg);
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if (!Inv) {
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CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, IntCR,
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getI32Imm((32-(3-Idx)) & 31),
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getI32Imm(31), getI32Imm(31));
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return CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, IntCR,
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getI32Imm((32-(3-Idx)) & 31),
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getI32Imm(31), getI32Imm(31));
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} else {
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SDOperand Tmp =
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CurDAG->getTargetNode(PPC::RLWINM, MVT::i32, IntCR,
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getI32Imm((32-(3-Idx)) & 31),
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getI32Imm(31),getI32Imm(31));
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CurDAG->SelectNodeTo(N, PPC::XORI, MVT::i32, Tmp, getI32Imm(1));
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return CurDAG->SelectNodeTo(N, PPC::XORI, MVT::i32, Tmp, getI32Imm(1));
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}
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return SDOperand(N, 0);
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}
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/// isCallCompatibleAddress - Return true if the specified 32-bit value is
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@ -896,12 +888,10 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) {
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case ISD::FrameIndex: {
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int FI = cast<FrameIndexSDNode>(N)->getIndex();
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if (N->hasOneUse()) {
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CurDAG->SelectNodeTo(N, PPC::ADDI, MVT::i32,
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CurDAG->getTargetFrameIndex(FI, MVT::i32),
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getI32Imm(0));
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return SDOperand(N, 0);
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}
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if (N->hasOneUse())
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return CurDAG->SelectNodeTo(N, PPC::ADDI, MVT::i32,
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CurDAG->getTargetFrameIndex(FI, MVT::i32),
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getI32Imm(0));
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return CurDAG->getTargetNode(PPC::ADDI, MVT::i32,
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CurDAG->getTargetFrameIndex(FI, MVT::i32),
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getI32Imm(0));
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@ -913,10 +903,8 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) {
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Tmp = CurDAG->getTargetNode(PPC::ADDIS, MVT::i32, getGlobalBaseReg(),CPI);
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else
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Tmp = CurDAG->getTargetNode(PPC::LIS, MVT::i32, CPI);
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if (N->hasOneUse()) {
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CurDAG->SelectNodeTo(N, PPC::LA, MVT::i32, Tmp, CPI);
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return SDOperand(N, 0);
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}
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if (N->hasOneUse())
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return CurDAG->SelectNodeTo(N, PPC::LA, MVT::i32, Tmp, CPI);
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return CurDAG->getTargetNode(PPC::LA, MVT::i32, Tmp, CPI);
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}
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case ISD::FADD: {
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@ -925,19 +913,17 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) {
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if (N->getOperand(0).getOpcode() == ISD::FMUL &&
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N->getOperand(0).Val->hasOneUse()) {
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++FusedFP; // Statistic
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CurDAG->SelectNodeTo(N, Ty == MVT::f64 ? PPC::FMADD : PPC::FMADDS, Ty,
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Select(N->getOperand(0).getOperand(0)),
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Select(N->getOperand(0).getOperand(1)),
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Select(N->getOperand(1)));
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return SDOperand(N, 0);
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return CurDAG->SelectNodeTo(N, Ty == MVT::f64 ? PPC::FMADD :PPC::FMADDS,
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Ty, Select(N->getOperand(0).getOperand(0)),
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Select(N->getOperand(0).getOperand(1)),
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Select(N->getOperand(1)));
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} else if (N->getOperand(1).getOpcode() == ISD::FMUL &&
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N->getOperand(1).hasOneUse()) {
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++FusedFP; // Statistic
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CurDAG->SelectNodeTo(N, Ty == MVT::f64 ? PPC::FMADD : PPC::FMADDS, Ty,
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Select(N->getOperand(1).getOperand(0)),
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Select(N->getOperand(1).getOperand(1)),
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Select(N->getOperand(0)));
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return SDOperand(N, 0);
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return CurDAG->SelectNodeTo(N, Ty == MVT::f64 ? PPC::FMADD :PPC::FMADDS,
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Ty, Select(N->getOperand(1).getOperand(0)),
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Select(N->getOperand(1).getOperand(1)),
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Select(N->getOperand(0)));
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}
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}
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@ -951,19 +937,17 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) {
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if (N->getOperand(0).getOpcode() == ISD::FMUL &&
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N->getOperand(0).Val->hasOneUse()) {
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++FusedFP; // Statistic
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CurDAG->SelectNodeTo(N, Ty == MVT::f64 ? PPC::FMSUB : PPC::FMSUBS, Ty,
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Select(N->getOperand(0).getOperand(0)),
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Select(N->getOperand(0).getOperand(1)),
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Select(N->getOperand(1)));
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return SDOperand(N, 0);
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return CurDAG->SelectNodeTo(N, Ty == MVT::f64 ? PPC::FMSUB:PPC::FMSUBS,
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Ty, Select(N->getOperand(0).getOperand(0)),
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Select(N->getOperand(0).getOperand(1)),
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Select(N->getOperand(1)));
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} else if (N->getOperand(1).getOpcode() == ISD::FMUL &&
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N->getOperand(1).Val->hasOneUse()) {
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++FusedFP; // Statistic
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CurDAG->SelectNodeTo(N, Ty == MVT::f64 ? PPC::FNMSUB : PPC::FNMSUBS, Ty,
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Select(N->getOperand(1).getOperand(0)),
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Select(N->getOperand(1).getOperand(1)),
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Select(N->getOperand(0)));
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return SDOperand(N, 0);
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return CurDAG->SelectNodeTo(N, Ty == MVT::f64 ?PPC::FNMSUB:PPC::FNMSUBS,
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Ty, Select(N->getOperand(1).getOperand(0)),
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Select(N->getOperand(1).getOperand(1)),
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Select(N->getOperand(0)));
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}
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}
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@ -983,9 +967,8 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) {
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CurDAG->getTargetNode(PPC::SRAWI, MVT::i32, MVT::Flag,
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Select(N->getOperand(0)),
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getI32Imm(Log2_32(Imm)));
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CurDAG->SelectNodeTo(N, PPC::ADDZE, MVT::i32,
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Op.getValue(0), Op.getValue(1));
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return SDOperand(N, 0);
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return CurDAG->SelectNodeTo(N, PPC::ADDZE, MVT::i32,
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Op.getValue(0), Op.getValue(1));
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} else if ((signed)Imm < 0 && isPowerOf2_32(-Imm)) {
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SDOperand Op =
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CurDAG->getTargetNode(PPC::SRAWI, MVT::i32, MVT::Flag,
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@ -994,8 +977,7 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) {
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SDOperand PT =
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CurDAG->getTargetNode(PPC::ADDZE, MVT::i32, Op.getValue(0),
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Op.getValue(1));
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CurDAG->SelectNodeTo(N, PPC::NEG, MVT::i32, PT);
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return SDOperand(N, 0);
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return CurDAG->SelectNodeTo(N, PPC::NEG, MVT::i32, PT);
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}
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}
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@ -1020,9 +1002,8 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) {
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isRunOfOnes(Imm, MB, ME);
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SH = 0;
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}
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CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Val, getI32Imm(SH),
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getI32Imm(MB), getI32Imm(ME));
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return SDOperand(N, 0);
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return CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Val, getI32Imm(SH),
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getI32Imm(MB), getI32Imm(ME));
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}
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// Other cases are autogenerated.
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@ -1038,10 +1019,9 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) {
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unsigned Imm, SH, MB, ME;
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if (isOpcWithIntImmediate(N->getOperand(0).Val, ISD::AND, Imm) &&
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isRotateAndMask(N, Imm, true, SH, MB, ME)) {
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CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32,
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Select(N->getOperand(0).getOperand(0)),
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getI32Imm(SH), getI32Imm(MB), getI32Imm(ME));
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return SDOperand(N, 0);
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return CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32,
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Select(N->getOperand(0).getOperand(0)),
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getI32Imm(SH), getI32Imm(MB), getI32Imm(ME));
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}
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// Other cases are autogenerated.
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@ -1051,10 +1031,10 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) {
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unsigned Imm, SH, MB, ME;
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if (isOpcWithIntImmediate(N->getOperand(0).Val, ISD::AND, Imm) &&
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isRotateAndMask(N, Imm, true, SH, MB, ME)) {
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CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32,
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Select(N->getOperand(0).getOperand(0)),
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getI32Imm(SH & 0x1F), getI32Imm(MB), getI32Imm(ME));
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return SDOperand(N, 0);
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return CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32,
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Select(N->getOperand(0).getOperand(0)),
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getI32Imm(SH & 0x1F), getI32Imm(MB),
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getI32Imm(ME));
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}
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// Other cases are autogenerated.
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@ -1079,18 +1059,16 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) {
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// fall through and generate a fneg instruction.
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if (Opc) {
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if (Opc == PPC::FNABSS || Opc == PPC::FNABSD)
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CurDAG->SelectNodeTo(N, Opc, Ty, Val.getOperand(0));
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return CurDAG->SelectNodeTo(N, Opc, Ty, Val.getOperand(0));
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else
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CurDAG->SelectNodeTo(N, Opc, Ty, Val.getOperand(0),
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Val.getOperand(1), Val.getOperand(2));
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return SDOperand(N, 0);
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return CurDAG->SelectNodeTo(N, Opc, Ty, Val.getOperand(0),
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Val.getOperand(1), Val.getOperand(2));
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}
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}
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if (Ty == MVT::f32)
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CurDAG->SelectNodeTo(N, PPC::FNEGS, MVT::f32, Val);
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return CurDAG->SelectNodeTo(N, PPC::FNEGS, MVT::f32, Val);
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else
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CurDAG->SelectNodeTo(N, PPC::FNEGD, MVT::f64, Val);
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return SDOperand(N, 0);
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return CurDAG->SelectNodeTo(N, PPC::FNEGD, MVT::f64, Val);
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}
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case ISD::LOAD:
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case ISD::EXTLOAD:
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@ -1129,9 +1107,9 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) {
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// If this is an f32 -> f64 load, emit the f32 load, then use an 'extending
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// copy'.
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if (TypeBeingLoaded != MVT::f32 || N->getOpcode() == ISD::LOAD) {
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CurDAG->SelectNodeTo(N, Opc, N->getValueType(0), MVT::Other,
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Op1, Op2, Select(N->getOperand(0)));
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return SDOperand(N, Op.ResNo);
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return CurDAG->SelectNodeTo(N, Opc, N->getValueType(0), MVT::Other,
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Op1, Op2, Select(N->getOperand(0))).
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getValue(Op.ResNo);
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} else {
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std::vector<SDOperand> Ops;
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Ops.push_back(Op1);
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@ -1177,9 +1155,8 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) {
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}
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}
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CurDAG->SelectNodeTo(N, Opc, MVT::Other, Select(N->getOperand(1)),
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AddrOp1, AddrOp2, Select(N->getOperand(0)));
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return SDOperand(N, 0);
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return CurDAG->SelectNodeTo(N, Opc, MVT::Other, Select(N->getOperand(1)),
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AddrOp1, AddrOp2, Select(N->getOperand(0)));
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}
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case ISD::SELECT_CC: {
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@ -1195,9 +1172,8 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) {
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SDOperand Tmp =
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CurDAG->getTargetNode(PPC::ADDIC, MVT::i32, MVT::Flag,
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LHS, getI32Imm(~0U));
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CurDAG->SelectNodeTo(N, PPC::SUBFE, MVT::i32, Tmp, LHS,
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Tmp.getValue(1));
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return SDOperand(N, 0);
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return CurDAG->SelectNodeTo(N, PPC::SUBFE, MVT::i32, Tmp, LHS,
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Tmp.getValue(1));
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}
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SDOperand CCReg = SelectCC(N->getOperand(0), N->getOperand(1), CC);
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@ -1211,10 +1187,10 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) {
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SelectCCOp = PPC::SELECT_CC_F4;
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else
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SelectCCOp = PPC::SELECT_CC_F8;
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CurDAG->SelectNodeTo(N, SelectCCOp, N->getValueType(0), CCReg,
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Select(N->getOperand(2)), Select(N->getOperand(3)),
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getI32Imm(BROpc));
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return SDOperand(N, 0);
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return CurDAG->SelectNodeTo(N, SelectCCOp, N->getValueType(0), CCReg,
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Select(N->getOperand(2)),
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Select(N->getOperand(3)),
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getI32Imm(BROpc));
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}
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case ISD::CALLSEQ_START:
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@ -1222,9 +1198,8 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) {
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unsigned Amt = cast<ConstantSDNode>(N->getOperand(1))->getValue();
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unsigned Opc = N->getOpcode() == ISD::CALLSEQ_START ?
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PPC::ADJCALLSTACKDOWN : PPC::ADJCALLSTACKUP;
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CurDAG->SelectNodeTo(N, Opc, MVT::Other,
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getI32Imm(Amt), Select(N->getOperand(0)));
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return SDOperand(N, 0);
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return CurDAG->SelectNodeTo(N, Opc, MVT::Other,
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getI32Imm(Amt), Select(N->getOperand(0)));
|
||||
}
|
||||
case ISD::RET: {
|
||||
SDOperand Chain = Select(N->getOperand(0)); // Token chain.
|
||||
@ -1246,13 +1221,11 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) {
|
||||
}
|
||||
|
||||
// Finally, select this to a blr (return) instruction.
|
||||
CurDAG->SelectNodeTo(N, PPC::BLR, MVT::Other, Chain);
|
||||
return SDOperand(N, 0);
|
||||
return CurDAG->SelectNodeTo(N, PPC::BLR, MVT::Other, Chain);
|
||||
}
|
||||
case ISD::BR:
|
||||
CurDAG->SelectNodeTo(N, PPC::B, MVT::Other, N->getOperand(1),
|
||||
Select(N->getOperand(0)));
|
||||
return SDOperand(N, 0);
|
||||
return CurDAG->SelectNodeTo(N, PPC::B, MVT::Other, N->getOperand(1),
|
||||
Select(N->getOperand(0)));
|
||||
case ISD::BR_CC:
|
||||
case ISD::BRTWOWAY_CC: {
|
||||
SDOperand Chain = Select(N->getOperand(0));
|
||||
@ -1284,7 +1257,7 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) {
|
||||
CondCode, getI32Imm(Opc),
|
||||
CondTrueBlock, CondFalseBlock,
|
||||
Chain);
|
||||
CurDAG->SelectNodeTo(N, PPC::B, MVT::Other, CondFalseBlock, CB);
|
||||
return CurDAG->SelectNodeTo(N, PPC::B, MVT::Other, CondFalseBlock, CB);
|
||||
} else {
|
||||
// Iterate to the next basic block
|
||||
ilist<MachineBasicBlock>::iterator It = BB;
|
||||
@ -1295,11 +1268,11 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) {
|
||||
// we have nothing better to set it to, and leaving it alone will cause
|
||||
// the PowerPC Branch Selection pass to crash.
|
||||
if (It == BB->getParent()->end()) It = Dest;
|
||||
CurDAG->SelectNodeTo(N, PPC::COND_BRANCH, MVT::Other, CondCode,
|
||||
getI32Imm(getBCCForSetCC(CC)), N->getOperand(4),
|
||||
CurDAG->getBasicBlock(It), Chain);
|
||||
return CurDAG->SelectNodeTo(N, PPC::COND_BRANCH, MVT::Other, CondCode,
|
||||
getI32Imm(getBCCForSetCC(CC)),
|
||||
N->getOperand(4), CurDAG->getBasicBlock(It),
|
||||
Chain);
|
||||
}
|
||||
return SDOperand(N, 0);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user