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Fix assertions in updateRegMaskSlots().

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The RegMaskSlots contains 'r' slots while NewIdx and OldIdx are 'B'
slots. This broke the checks in the assertions.

This fixes PR14302.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167625 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2012-11-09 19:18:49 +00:00
parent b3235b128f
commit 722c9a7925
2 changed files with 59 additions and 4 deletions
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18
lib/CodeGen/LiveIntervalAnalysis.cpp
View File

@ -146,6 +146,11 @@ void LiveIntervals::print(raw_ostream &OS, const Module* ) const {
OS << PrintReg(Reg) << " = " << getInterval(Reg) << '\n'; OS << PrintReg(Reg) << " = " << getInterval(Reg) << '\n';
} }
OS << "RegMasks:";
for (unsigned i = 0, e = RegMaskSlots.size(); i != e; ++i)
OS << ' ' << RegMaskSlots[i];
OS << '\n';
printInstrs(OS); printInstrs(OS);
} }
@ -1257,10 +1262,15 @@ private:
SmallVectorImpl<SlotIndex>::iterator RI = SmallVectorImpl<SlotIndex>::iterator RI =
std::lower_bound(LIS.RegMaskSlots.begin(), LIS.RegMaskSlots.end(), std::lower_bound(LIS.RegMaskSlots.begin(), LIS.RegMaskSlots.end(),
OldIdx); OldIdx);
assert(*RI == OldIdx && "No RegMask at OldIdx."); assert(RI != LIS.RegMaskSlots.end() && *RI == OldIdx.getRegSlot() &&
*RI = NewIdx; "No RegMask at OldIdx.");
assert(*prior(RI) < *RI && *RI < *next(RI) && *RI = NewIdx.getRegSlot();
"RegSlots out of order. Did you move one call across another?"); assert((RI == LIS.RegMaskSlots.begin() ||
SlotIndex::isEarlierInstr(*llvm::prior(RI), *RI)) &&
"Cannot move regmask instruction above another call");
assert((llvm::next(RI) == LIS.RegMaskSlots.end() ||
SlotIndex::isEarlierInstr(*RI, *llvm::next(RI))) &&
"Cannot move regmask instruction below another call");
} }
// Return the last use of reg between NewIdx and OldIdx. // Return the last use of reg between NewIdx and OldIdx.

45
test/CodeGen/PowerPC/misched.ll Normal file
View File

@ -0,0 +1,45 @@
; RUN: llc < %s -enable-misched -verify-machineinstrs
; PR14302
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
target triple = "powerpc64-bgq-linux"
@b = external global [16000 x double], align 32
define void @pr14302() nounwind {
entry:
tail call void @putchar() nounwind
br label %for.body
for.body: ; preds = %for.body, %entry
br i1 undef, label %for.body, label %for.body24.i
for.body24.i: ; preds = %for.body24.i, %for.body
store double 1.000000e+00, double* undef, align 8
br i1 undef, label %for.body24.i58, label %for.body24.i
for.body24.i58: ; preds = %for.body24.i58, %for.body24.i
%arrayidx26.i55.1 = getelementptr inbounds [16000 x double]* @b, i64 0, i64 undef
store double 1.000000e+00, double* %arrayidx26.i55.1, align 8
br i1 undef, label %for.body24.i64, label %for.body24.i58
for.body24.i64: ; preds = %for.body24.i64, %for.body24.i58
%exitcond.2489 = icmp eq i32 0, 16000
br i1 %exitcond.2489, label %for.body24.i70, label %for.body24.i64
for.body24.i70: ; preds = %for.body24.i70, %for.body24.i64
br i1 undef, label %for.body24.i76, label %for.body24.i70
for.body24.i76: ; preds = %for.body24.i76, %for.body24.i70
br i1 undef, label %set1d.exit77, label %for.body24.i76
set1d.exit77: ; preds = %for.body24.i76
br label %for.body29
for.body29: ; preds = %for.body29, %set1d.exit77
br i1 undef, label %for.end35, label %for.body29
for.end35: ; preds = %for.body29
ret void
}
declare void @putchar()