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Moved enum and command-line option in separate file. Also added function that returns the user selected register allocator to the caller.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8819 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Alkis Evlogimenos 2003-10-02 16:57:49 +00:00
parent 19092619ff
commit 7237ecef13
3 changed files with 40 additions and 30 deletions
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4
include/llvm/CodeGen/Passes.h
View File

@ -19,7 +19,9 @@ class TargetMachine;
//
extern const PassInfo *PHIEliminationID;
enum RegAllocName { simple, local };
/// Creates a register allocator as the user specified on the command
/// line.
FunctionPass *createRegisterAllocator();
/// SimpleRegisterAllocation Pass - This pass converts the input machine code
/// from SSA form to use explicit registers by spilling every register. Wow,

35
lib/CodeGen/Passes.cpp Normal file
View File

@ -0,0 +1,35 @@
//===-- Passes.cpp - Target independent code generation passes -*- C++ -*-===//
//
// This file defines interfaces to access the target independent code
// generation passes provided by the LLVM backend.
//
//===---------------------------------------------------------------------===//
#include "llvm/CodeGen/Passes.h"
#include "Support/CommandLine.h"
namespace {
enum RegAllocName { simple, local };
cl::opt<RegAllocName>
RegAlloc("regalloc",
cl::desc("Register allocator to use: (default = simple)"),
cl::Prefix,
cl::values(clEnumVal(simple, " simple register allocator"),
clEnumVal(local, " local register allocator"),
0),
cl::init(local));
}
FunctionPass *createRegisterAllocator()
{
switch (RegAlloc) {
case simple:
return createSimpleRegisterAllocator();
case local:
return createLocalRegisterAllocator();
default:
assert(0 && "no register allocator selected");
return 0; // not reached
}
}

31
lib/Target/X86/X86TargetMachine.cpp
View File

@ -16,15 +16,6 @@
#include "Support/Statistic.h"
namespace {
cl::opt<RegAllocName>
RegAlloc("regalloc",
cl::desc("Register allocator to use: (default = simple)"),
cl::Prefix,
cl::values(clEnumVal(simple, " simple register allocator"),
clEnumVal(local, " local register allocator"),
0),
cl::init(local));
cl::opt<bool> PrintCode("print-machineinstrs",
cl::desc("Print generated machine code"));
cl::opt<bool> NoPatternISel("disable-pattern-isel", cl::init(true),
@ -73,16 +64,7 @@ bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM,
PM.add(createMachineFunctionPrinterPass());
// Perform register allocation to convert to a concrete x86 representation
switch (RegAlloc) {
case simple:
PM.add(createSimpleRegisterAllocator());
break;
case local:
PM.add(createLocalRegisterAllocator());
break;
default:
assert(0 && "no register allocator selected");
}
PM.add(createRegisterAllocator());
if (PrintCode)
PM.add(createMachineFunctionPrinterPass());
@ -126,16 +108,7 @@ bool X86TargetMachine::addPassesToJITCompile(FunctionPassManager &PM) {
PM.add(createMachineFunctionPrinterPass());
// Perform register allocation to convert to a concrete x86 representation
switch (RegAlloc) {
case simple:
PM.add(createSimpleRegisterAllocator());
break;
case local:
PM.add(createLocalRegisterAllocator());
break;
default:
assert(0 && "no register allocator selected");
}
PM.add(createRegisterAllocator());
if (PrintCode)
PM.add(createMachineFunctionPrinterPass());