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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-22 10:29:35 +00:00
Moved enum and command-line option in separate file. Also added function that returns the user selected register allocator to the caller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8819 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -19,7 +19,9 @@ class TargetMachine;
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//
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extern const PassInfo *PHIEliminationID;
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enum RegAllocName { simple, local };
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/// Creates a register allocator as the user specified on the command
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/// line.
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FunctionPass *createRegisterAllocator();
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/// SimpleRegisterAllocation Pass - This pass converts the input machine code
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/// from SSA form to use explicit registers by spilling every register. Wow,
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35
lib/CodeGen/Passes.cpp
Normal file
35
lib/CodeGen/Passes.cpp
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@ -0,0 +1,35 @@
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//===-- Passes.cpp - Target independent code generation passes -*- C++ -*-===//
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//
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// This file defines interfaces to access the target independent code
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// generation passes provided by the LLVM backend.
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//
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//===---------------------------------------------------------------------===//
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#include "llvm/CodeGen/Passes.h"
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#include "Support/CommandLine.h"
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namespace {
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enum RegAllocName { simple, local };
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cl::opt<RegAllocName>
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RegAlloc("regalloc",
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cl::desc("Register allocator to use: (default = simple)"),
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cl::Prefix,
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cl::values(clEnumVal(simple, " simple register allocator"),
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clEnumVal(local, " local register allocator"),
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0),
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cl::init(local));
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}
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FunctionPass *createRegisterAllocator()
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{
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switch (RegAlloc) {
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case simple:
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return createSimpleRegisterAllocator();
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case local:
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return createLocalRegisterAllocator();
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default:
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assert(0 && "no register allocator selected");
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return 0; // not reached
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}
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}
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@ -16,15 +16,6 @@
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#include "Support/Statistic.h"
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namespace {
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cl::opt<RegAllocName>
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RegAlloc("regalloc",
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cl::desc("Register allocator to use: (default = simple)"),
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cl::Prefix,
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cl::values(clEnumVal(simple, " simple register allocator"),
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clEnumVal(local, " local register allocator"),
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0),
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cl::init(local));
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cl::opt<bool> PrintCode("print-machineinstrs",
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cl::desc("Print generated machine code"));
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cl::opt<bool> NoPatternISel("disable-pattern-isel", cl::init(true),
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@ -73,16 +64,7 @@ bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM,
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PM.add(createMachineFunctionPrinterPass());
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// Perform register allocation to convert to a concrete x86 representation
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switch (RegAlloc) {
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case simple:
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PM.add(createSimpleRegisterAllocator());
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break;
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case local:
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PM.add(createLocalRegisterAllocator());
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break;
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default:
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assert(0 && "no register allocator selected");
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}
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PM.add(createRegisterAllocator());
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if (PrintCode)
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PM.add(createMachineFunctionPrinterPass());
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@ -126,16 +108,7 @@ bool X86TargetMachine::addPassesToJITCompile(FunctionPassManager &PM) {
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PM.add(createMachineFunctionPrinterPass());
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// Perform register allocation to convert to a concrete x86 representation
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switch (RegAlloc) {
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case simple:
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PM.add(createSimpleRegisterAllocator());
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break;
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case local:
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PM.add(createLocalRegisterAllocator());
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break;
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default:
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assert(0 && "no register allocator selected");
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}
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PM.add(createRegisterAllocator());
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if (PrintCode)
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PM.add(createMachineFunctionPrinterPass());
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