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DAGCombiner: Don't fold xor into not if getNOT would introduce an illegal constant.

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This happens e.g. with <2 x i64> -1 on x86_32. It cannot be generated directly
because i64 is illegal. It would be nice if getNOT would handle this
transparently, but I don't see a way to generate a legal constant there right
now. Fixes PR17487.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192795 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Benjamin Kramer 2013-10-16 14:16:19 +00:00
parent 3386d25257
commit 72a3ee7422
2 changed files with 15 additions and 1 deletions
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2
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -3583,7 +3583,7 @@ SDValue DAGCombiner::visitXOR(SDNode *N) {
}
// fold (xor (and x, y), y) -> (and (not x), y)
if (N0.getOpcode() == ISD::AND && N0.getNode()->hasOneUse() &&
N0->getOperand(1) == N1) {
N0->getOperand(1) == N1 && isTypeLegal(VT.getScalarType())) {
SDValue X = N0->getOperand(0);
SDValue NotX = DAG.getNOT(SDLoc(X), X, VT);
AddToWorkList(NotX.getNode());

14
test/CodeGen/X86/xor.ll
View File

@ -165,3 +165,17 @@ define <4 x i32> @test10(<4 x i32> %a) nounwind {
; X32-LABEL: test10:
; X32: andnps
}
define i32 @PR17487(i1 %tobool) {
%tmp = insertelement <2 x i1> undef, i1 %tobool, i32 1
%tmp1 = zext <2 x i1> %tmp to <2 x i64>
%tmp2 = xor <2 x i64> %tmp1, <i64 1, i64 1>
%tmp3 = extractelement <2 x i64> %tmp2, i32 1
%add = add nsw i64 0, %tmp3
%cmp6 = icmp ne i64 %add, 1
%conv7 = zext i1 %cmp6 to i32
ret i32 %conv7
; X64-LABEL: PR17487:
; X64: andn
}