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Print .mask and .fmask with the target streamer.

Browse Source 
Testing this also found the missing '\n' after .frame that this patch also
fixes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200192 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola 2014-01-27 04:33:11 +00:00
parent 878e272310
commit 72e501f0be
4 changed files with 46 additions and 22 deletions
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33
lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
View File

@ -91,7 +91,28 @@ void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
OS << "\t.frame\t$"
<< StringRef(MipsInstPrinter::getRegisterName(StackReg)).lower() << ","
<< StackSize << ",$"
<< StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower();
<< StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n';
}
// Print a 32 bit hex number with all numbers.
static void printHex32(unsigned Value, raw_ostream &OS) {
OS << "0x";
for (int i = 7; i >= 0; i--)
OS.write_hex((Value & (0xF << (i*4))) >> (i*4));
}
void MipsTargetAsmStreamer::emitMask(unsigned CPUBitmask,
int CPUTopSavedRegOff) {
OS << "\t.mask \t";
printHex32(CPUBitmask, OS);
OS << ',' << CPUTopSavedRegOff << '\n';
}
void MipsTargetAsmStreamer::emitFMask(unsigned FPUBitmask,
int FPUTopSavedRegOff) {
OS << "\t.fmask\t";
printHex32(FPUBitmask, OS);
OS << "," << FPUTopSavedRegOff << '\n';
}
// This part is for ELF object output.
@ -222,3 +243,13 @@ void MipsTargetELFStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
unsigned ReturnReg) {
// FIXME: implement.
}
void MipsTargetELFStreamer::emitMask(unsigned CPUBitmask,
int CPUTopSavedRegOff) {
// FIXME: implement.
}
void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask,
int FPUTopSavedRegOff) {
// FIXME: implement.
}

26
lib/Target/Mips/MipsAsmPrinter.cpp
View File

@ -172,7 +172,7 @@ void MipsAsmPrinter::EmitInstruction(const MachineInstr *MI) {
// Create a bitmask with all callee saved registers for CPU or Floating Point
// registers. For CPU registers consider RA, GP and FP for saving if necessary.
void MipsAsmPrinter::printSavedRegsBitmask(raw_ostream &O) {
void MipsAsmPrinter::printSavedRegsBitmask() {
// CPU and FPU Saved Registers Bitmasks
unsigned CPUBitmask = 0, FPUBitmask = 0;
int CPUTopSavedRegOff, FPUTopSavedRegOff;
@ -220,20 +220,12 @@ void MipsAsmPrinter::printSavedRegsBitmask(raw_ostream &O) {
// CPU Regs are saved below FP Regs.
CPUTopSavedRegOff = CPUBitmask ? -CSFPRegsSize - CPURegSize : 0;
MipsTargetStreamer &TS = getTargetStreamer();
// Print CPUBitmask
O << "\t.mask \t"; printHex32(CPUBitmask, O);
O << ',' << CPUTopSavedRegOff << '\n';
TS.emitMask(CPUBitmask, CPUTopSavedRegOff);
// Print FPUBitmask
O << "\t.fmask\t"; printHex32(FPUBitmask, O);
O << "," << FPUTopSavedRegOff << '\n';
}
// Print a 32 bit hex number with all numbers.
void MipsAsmPrinter::printHex32(unsigned Value, raw_ostream &O) {
O << "0x";
for (int i = 7; i >= 0; i--)
O.write_hex((Value & (0xF << (i*4))) >> (i*4));
TS.emitFMask(FPUBitmask, FPUTopSavedRegOff);
}
//===----------------------------------------------------------------------===//
@ -293,13 +285,9 @@ void MipsAsmPrinter::EmitFunctionBodyStart() {
if (!IsNakedFunction)
emitFrameDirective();
if (OutStreamer.hasRawTextSupport()) {
SmallString<128> Str;
raw_svector_ostream OS(Str);
if (!IsNakedFunction)
printSavedRegsBitmask(OS);
OutStreamer.EmitRawText(OS.str());
}
if (!IsNakedFunction)
printSavedRegsBitmask();
if (!Subtarget->inMips16Mode()) {
TS.emitDirectiveSetNoReorder();
TS.emitDirectiveSetNoMacro();

3
lib/Target/Mips/MipsAsmPrinter.h
View File

@ -78,8 +78,7 @@ public:
}
void EmitInstruction(const MachineInstr *MI);
void printSavedRegsBitmask(raw_ostream &O);
void printHex32(unsigned int Value, raw_ostream &O);
void printSavedRegsBitmask();
void emitFrameDirective();
const char *getCurrentABIString() const;
virtual void EmitFunctionEntryLabel();

6
lib/Target/Mips/MipsTargetStreamer.h
View File

@ -37,6 +37,8 @@ public:
virtual void emitDirectiveOptionPic0() = 0;
virtual void emitFrame(unsigned StackReg, unsigned StackSize,
unsigned ReturnReg) = 0;
virtual void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) = 0;
virtual void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) = 0;
};
// This part is for ascii assembly output
@ -63,6 +65,8 @@ public:
virtual void emitDirectiveOptionPic0();
virtual void emitFrame(unsigned StackReg, unsigned StackSize,
unsigned ReturnReg);
virtual void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff);
virtual void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff);
};
// This part is for ELF object output
@ -94,6 +98,8 @@ public:
virtual void emitDirectiveOptionPic0();
virtual void emitFrame(unsigned StackReg, unsigned StackSize,
unsigned ReturnReg);
virtual void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff);
virtual void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff);
};
}
#endif