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Add LdStSTD* itin. for the PPC64 A2 core.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153850 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -350,6 +350,26 @@ def PPCA2Itineraries : ProcessorItineraries<
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InstrStage<1, [XEX5]>, InstrStage<1, [XEX6]>],
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[26, 7],
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[NoBypass, GPR_Bypass]>,
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InstrItinData<LdStSTD , [InstrStage<4, [IU0to3_0, IU0to3_1, IU0to3_2, IU0to3_3]>,
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InstrStage<1, [IU4_0, IU4_1, IU4_2, IU4_3,
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IU4_4, IU4_5, IU4_6, IU4_7]>,
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InstrStage<1, [IU5]>, InstrStage<1, [IU6]>,
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InstrStage<1, [RF0]>, InstrStage<1, [XRF1]>,
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InstrStage<1, [XEX1]>, InstrStage<1, [XEX2]>,
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InstrStage<1, [XEX3]>, InstrStage<1, [XEX4]>,
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InstrStage<1, [XEX5]>, InstrStage<1, [XEX6]>],
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[13, 7],
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[GPR_Bypass, GPR_Bypass]>,
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InstrItinData<LdStSTDCX , [InstrStage<4, [IU0to3_0, IU0to3_1, IU0to3_2, IU0to3_3]>,
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InstrStage<1, [IU4_0, IU4_1, IU4_2, IU4_3,
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IU4_4, IU4_5, IU4_6, IU4_7]>,
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InstrStage<1, [IU5]>, InstrStage<13, [IU6]>,
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InstrStage<1, [RF0]>, InstrStage<1, [XRF1]>,
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InstrStage<1, [XEX1]>, InstrStage<1, [XEX2]>,
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InstrStage<1, [XEX3]>, InstrStage<1, [XEX4]>,
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InstrStage<1, [XEX5]>, InstrStage<1, [XEX6]>],
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[26, 7],
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[NoBypass, GPR_Bypass]>,
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InstrItinData<LdStSTWCX , [InstrStage<4, [IU0to3_0, IU0to3_1, IU0to3_2, IU0to3_3]>,
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InstrStage<1, [IU4_0, IU4_1, IU4_2, IU4_3,
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IU4_4, IU4_5, IU4_6, IU4_7]>,
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