6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-08-21 18:29:46 +00:00
Code Issues Projects Releases Wiki Activity

Add LdStSTD* itin. for the PPC64 A2 core.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153850 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Hal Finkel 2012-04-01 20:08:08 +00:00
parent 4ac9081c71
commit 730acfb413
1 changed files with 20 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
lib/Target/PowerPC/PPCScheduleA2.td
View File

@ -350,6 +350,26 @@ def PPCA2Itineraries : ProcessorItineraries<
InstrStage<1, [XEX5]>, InstrStage<1, [XEX6]>],
[26, 7],
[NoBypass, GPR_Bypass]>,
InstrItinData<LdStSTD , [InstrStage<4, [IU0to3_0, IU0to3_1, IU0to3_2, IU0to3_3]>,
InstrStage<1, [IU4_0, IU4_1, IU4_2, IU4_3,
IU4_4, IU4_5, IU4_6, IU4_7]>,
InstrStage<1, [IU5]>, InstrStage<1, [IU6]>,
InstrStage<1, [RF0]>, InstrStage<1, [XRF1]>,
InstrStage<1, [XEX1]>, InstrStage<1, [XEX2]>,
InstrStage<1, [XEX3]>, InstrStage<1, [XEX4]>,
InstrStage<1, [XEX5]>, InstrStage<1, [XEX6]>],
[13, 7],
[GPR_Bypass, GPR_Bypass]>,
InstrItinData<LdStSTDCX , [InstrStage<4, [IU0to3_0, IU0to3_1, IU0to3_2, IU0to3_3]>,
InstrStage<1, [IU4_0, IU4_1, IU4_2, IU4_3,
IU4_4, IU4_5, IU4_6, IU4_7]>,
InstrStage<1, [IU5]>, InstrStage<13, [IU6]>,
InstrStage<1, [RF0]>, InstrStage<1, [XRF1]>,
InstrStage<1, [XEX1]>, InstrStage<1, [XEX2]>,
InstrStage<1, [XEX3]>, InstrStage<1, [XEX4]>,
InstrStage<1, [XEX5]>, InstrStage<1, [XEX6]>],
[26, 7],
[NoBypass, GPR_Bypass]>,
InstrItinData<LdStSTWCX , [InstrStage<4, [IU0to3_0, IU0to3_1, IU0to3_2, IU0to3_3]>,
InstrStage<1, [IU4_0, IU4_1, IU4_2, IU4_3,
IU4_4, IU4_5, IU4_6, IU4_7]>,