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Desensitize a couple of PPC regression tests

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Use CHECK-DAG to make these regression tests more resilient against changes in
instruction scheduling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195978 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Hal Finkel 2013-11-30 19:52:28 +00:00
parent 36e5511188
commit 7373abd81e
2 changed files with 6 additions and 6 deletions
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4
test/CodeGen/PowerPC/sjlj.ll
View File

@ -134,8 +134,8 @@ return: ; preds = %if.end, %if.then
; CHECK: @main2
; CHECK: addis [[REG:[0-9]+]], 2, env_sigill@toc@ha
; CHECK: std 31, env_sigill@toc@l([[REG]])
; CHECK: addi [[REGB:[0-9]+]], [[REG]], env_sigill@toc@l
; CHECK-DAG: std 31, env_sigill@toc@l([[REG]])
; CHECK-DAG: addi [[REGB:[0-9]+]], [[REG]], env_sigill@toc@l
; CHECK-DAG: std [[REGB]], [[OFF:[0-9]+]](31) # 8-byte Folded Spill
; CHECK-DAG: std 1, 16([[REGB]])
; CHECK-DAG: std 2, 24([[REGB]])

8
test/CodeGen/PowerPC/unaligned.ll
View File

@ -65,9 +65,9 @@ entry:
; These loads and stores are legalized into aligned loads and stores
; using aligned stack slots.
; CHECK: @foo6
; CHECK: ld
; CHECK: ld
; CHECK: std
; CHECK: std
; CHECK-DAG: ld
; CHECK-DAG: ld
; CHECK-DAG: stdx
; CHECK: stdx
}