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A *bunch* of tests for AVX intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109881 91177308-0d34-0410-b5e6-96231b3b80d8
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test/CodeGen/X86/avx-intrinsics-x86.ll
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1956
test/CodeGen/X86/avx-intrinsics-x86.ll
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test/CodeGen/X86/avx-intrinsics-x86_64.ll
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test/CodeGen/X86/avx-intrinsics-x86_64.ll
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; RUN: llc < %s -march=x86-64 -mattr=avx,aes | FileCheck %s
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define i64 @test_x86_sse2_cvtsd2si64(<2 x double> %a0) {
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; CHECK: vcvtsd2si
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%res = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %a0) ; <i64> [#uses=1]
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ret i64 %res
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}
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declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) nounwind readnone
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define <2 x double> @test_x86_sse2_cvtsi642sd(<2 x double> %a0, i64 %a1) {
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; CHECK: vcvtsi2sd
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%res = call <2 x double> @llvm.x86.sse2.cvtsi642sd(<2 x double> %a0, i64 %a1) ; <<2 x double>> [#uses=1]
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ret <2 x double> %res
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}
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declare <2 x double> @llvm.x86.sse2.cvtsi642sd(<2 x double>, i64) nounwind readnone
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define i64 @test_x86_sse2_cvttsd2si64(<2 x double> %a0) {
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; CHECK: vcvttss2si
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%res = call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %a0) ; <i64> [#uses=1]
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ret i64 %res
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}
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declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>) nounwind readnone
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define i64 @test_x86_sse_cvtss2si64(<4 x float> %a0) {
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; CHECK: vcvtss2si
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%res = call i64 @llvm.x86.sse.cvtss2si64(<4 x float> %a0) ; <i64> [#uses=1]
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ret i64 %res
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}
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declare i64 @llvm.x86.sse.cvtss2si64(<4 x float>) nounwind readnone
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define <4 x float> @test_x86_sse_cvtsi642ss(<4 x float> %a0, i64 %a1) {
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; CHECK: vcvtsi2ss
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%res = call <4 x float> @llvm.x86.sse.cvtsi642ss(<4 x float> %a0, i64 %a1) ; <<4 x float>> [#uses=1]
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ret <4 x float> %res
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}
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declare <4 x float> @llvm.x86.sse.cvtsi642ss(<4 x float>, i64) nounwind readnone
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define i64 @test_x86_sse_cvttss2si64(<4 x float> %a0) {
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; CHECK: vcvttss2si
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%res = call i64 @llvm.x86.sse.cvttss2si64(<4 x float> %a0) ; <i64> [#uses=1]
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ret i64 %res
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}
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declare i64 @llvm.x86.sse.cvttss2si64(<4 x float>) nounwind readnone
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