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FastISel support for i1 PHI nodes.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56069 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
2008-09-10 21:01:31 +00:00
parent 8211648757
commit 74321abb4f
1 changed files with 7 additions and 2 deletions
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9
lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
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@@ -5612,8 +5612,13 @@ SelectionDAGISel::HandlePHINodesInSuccessorBlocksFast(BasicBlock *LLVMBB,
// exactly one register for each non-void instruction. // exactly one register for each non-void instruction.
MVT VT = TLI.getValueType(PN->getType(), /*AllowUnknown=*/true); MVT VT = TLI.getValueType(PN->getType(), /*AllowUnknown=*/true);
if (VT == MVT::Other || !TLI.isTypeLegal(VT)) { if (VT == MVT::Other || !TLI.isTypeLegal(VT)) {
SDL->PHINodesToUpdate.resize(OrigNumPHINodesToUpdate); // Promote MVT::i1.
return false; if (VT == MVT::i1)
VT = TLI.getTypeToTransformTo(VT);
else {
SDL->PHINodesToUpdate.resize(OrigNumPHINodesToUpdate);
return false;
}
} }
Value *PHIOp = PN->getIncomingValueForBlock(LLVMBB); Value *PHIOp = PN->getIncomingValueForBlock(LLVMBB);