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Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool

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would have been a Godsend here!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47625 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling
2008-02-26 21:11:01 +00:00
parent 4d535cadf1
commit 74ab84c31e
28 changed files with 88 additions and 85 deletions
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lib/CodeGen/RegAllocLinearScan.cpp
+7 -6
View File
@@ -164,7 +164,7 @@ namespace {
if (TargetRegisterInfo::isVirtualRegister(reg)) {
reg = vrm_->getPhys(reg);
}
DOUT << tri_->getName(reg) << '\n';
DOUT << tri_->getPrintableName(reg) << '\n';
}
}
};
@@ -239,7 +239,8 @@ unsigned RALinScan::attemptTrivialCoalescing(LiveInterval &cur, unsigned Reg) {
// Try to coalesce.
if (!li_->conflictsWithPhysRegDef(cur, *vrm_, SrcReg)) {
DOUT << "Coalescing: " << cur << " -> " << tri_->getName(SrcReg) << '\n';
DOUT << "Coalescing: " << cur << " -> " << tri_->getPrintableName(SrcReg)
<< '\n';
vrm_->clearVirt(cur.reg);
vrm_->assignVirt2Phys(cur.reg, SrcReg);
++NumCoalesce;
@@ -627,7 +628,7 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur)
// the free physical register and add this interval to the active
// list.
if (physReg) {
DOUT << tri_->getName(physReg) << '\n';
DOUT << tri_->getPrintableName(physReg) << '\n';
vrm_->assignVirt2Phys(cur->reg, physReg);
prt_->addRegUse(physReg);
active_.push_back(std::make_pair(cur, cur->begin()));
@@ -689,7 +690,7 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur)
}
DOUT << "\t\tregister with min weight: "
<< tri_->getName(minReg) << " (" << minWeight << ")\n";
<< tri_->getPrintableName(minReg) << " (" << minWeight << ")\n";
// if the current has the minimum weight, we need to spill it and
// add any added intervals back to unhandled, and restart
@@ -868,11 +869,11 @@ unsigned RALinScan::getFreePhysReg(LiveInterval *cur) {
if (cur->preference) {
if (prt_->isRegAvail(cur->preference)) {
DOUT << "\t\tassigned the preferred register: "
<< tri_->getName(cur->preference) << "\n";
<< tri_->getPrintableName(cur->preference) << "\n";
return cur->preference;
} else
DOUT << "\t\tunable to assign the preferred register: "
<< tri_->getName(cur->preference) << "\n";
<< tri_->getPrintableName(cur->preference) << "\n";
}
// Scan for the first available register.