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X86: Don't form min/max nodes if the target is missing SSE.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140294 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Benjamin Kramer 2011-09-22 03:01:42 +00:00
parent 459cad2dfd
commit 74f3501d15
1 changed files with 2 additions and 1 deletions
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3
lib/Target/X86/X86ISelLowering.cpp
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@ -12568,7 +12568,8 @@ static SDValue PerformSELECTCombine(SDNode *N, SelectionDAG &DAG,
// instructions match the semantics of the common C idiom x<y?x:y but not
// x<=y?x:y, because of how they handle negative zero (which can be
// ignored in unsafe-math mode).
if (Cond.getOpcode() == ISD::SETCC && VT.isFloatingPoint() &&
if (Subtarget->hasXMM() &&
Cond.getOpcode() == ISD::SETCC && VT.isFloatingPoint() &&
VT != MVT::f80 && DAG.getTargetLoweringInfo().isTypeLegal(VT)) {
ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();