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Fix indentation and wrap code at 80 cols

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15107 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Misha Brukman
2004-07-22 15:26:23 +00:00
parent d3014edc51
commit 75fa4e4f99
1 changed files with 89 additions and 99 deletions
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30
lib/CodeGen/TwoAddressInstructionPass.cpp
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@ -48,22 +48,20 @@ namespace {
Statistic<> numInstrsAdded("twoaddressinstruction", Statistic<> numInstrsAdded("twoaddressinstruction",
"Number of instructions added"); "Number of instructions added");
struct TwoAddressInstructionPass : public MachineFunctionPass struct TwoAddressInstructionPass : public MachineFunctionPass {
{
virtual void getAnalysisUsage(AnalysisUsage &AU) const; virtual void getAnalysisUsage(AnalysisUsage &AU) const;
/// runOnMachineFunction - pass entry point /// runOnMachineFunction - pass entry point
bool runOnMachineFunction(MachineFunction&); bool runOnMachineFunction(MachineFunction&);
}; };
RegisterPass<TwoAddressInstructionPass> X( RegisterPass<TwoAddressInstructionPass>
"twoaddressinstruction", "Two-Address instruction pass"); X("twoaddressinstruction", "Two-Address instruction pass");
}; };
const PassInfo *llvm::TwoAddressInstructionPassID = X.getPassInfo(); const PassInfo *llvm::TwoAddressInstructionPassID = X.getPassInfo();
void TwoAddressInstructionPass::getAnalysisUsage(AnalysisUsage &AU) const void TwoAddressInstructionPass::getAnalysisUsage(AnalysisUsage &AU) const {
{
AU.addPreserved<LiveVariables>(); AU.addPreserved<LiveVariables>();
AU.addPreservedID(PHIEliminationID); AU.addPreservedID(PHIEliminationID);
MachineFunctionPass::getAnalysisUsage(AU); MachineFunctionPass::getAnalysisUsage(AU);
@ -96,13 +94,9 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
continue; continue;
++numTwoAddressInstrs; ++numTwoAddressInstrs;
DEBUG(std::cerr << '\t'; mi->print(std::cerr, &TM)); DEBUG(std::cerr << '\t'; mi->print(std::cerr, &TM));
assert(mi->getOperand(1).isRegister() && mi->getOperand(1).getReg() &&
assert(mi->getOperand(1).isRegister() && mi->getOperand(1).isUse() && "two address instruction invalid");
mi->getOperand(1).getReg() &&
mi->getOperand(1).isUse() &&
"two address instruction invalid");
// if the two operands are the same we just remove the use // if the two operands are the same we just remove the use
// and mark the def as def&use, otherwise we have to insert a copy. // and mark the def as def&use, otherwise we have to insert a copy.
@ -129,19 +123,16 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
mi->getOperand(i).getReg() != regA); mi->getOperand(i).getReg() != regA);
#endif #endif
const TargetRegisterClass* rc = const TargetRegisterClass* rc = MF.getSSARegMap()->getRegClass(regA);
MF.getSSARegMap()->getRegClass(regA);
unsigned Added = MRI.copyRegToReg(*mbbi, mi, regA, regB, rc); unsigned Added = MRI.copyRegToReg(*mbbi, mi, regA, regB, rc);
numInstrsAdded += Added; numInstrsAdded += Added;
MachineBasicBlock::iterator prevMi = prior(mi); MachineBasicBlock::iterator prevMi = prior(mi);
DEBUG(std::cerr << "\t\tprepend:\t"; DEBUG(std::cerr << "\t\tprepend:\t"; prevMi->print(std::cerr, &TM));
prevMi->print(std::cerr, &TM));
if (LV) { if (LV) {
// update live variables for regA // update live variables for regA
assert(Added == 1 && assert(Added == 1 && "Cannot handle multi-instruction copies yet!");
"Cannot handle multi-instruction copies yet!");
LiveVariables::VarInfo& varInfo = LV->getVarInfo(regA); LiveVariables::VarInfo& varInfo = LV->getVarInfo(regA);
varInfo.DefInst = prevMi; varInfo.DefInst = prevMi;
@ -166,8 +157,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
mi->RemoveOperand(1); mi->RemoveOperand(1);
MadeChange = true; MadeChange = true;
DEBUG(std::cerr << "\t\trewrite to:\t"; DEBUG(std::cerr << "\t\trewrite to:\t"; mi->print(std::cerr, &TM));
mi->print(std::cerr, &TM));
} }
} }