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fix store issue and an FP conversion (segfault) issue
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20066 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1164,14 +1164,16 @@ unsigned ISel::SelectExpr(SDOperand N) {
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void ISel::Select(SDOperand N) {
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void ISel::Select(SDOperand N) {
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unsigned Tmp1, Tmp2, Opc;
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unsigned Tmp1, Tmp2, Opc;
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unsigned opcode = N.getOpcode();
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// FIXME: Disable for our current expansion model!
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// FIXME: Disable for our current expansion model!
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if (/*!N->hasOneUse() &&*/ !ExprMap.insert(std::make_pair(N, notIn)).second)
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if (/*!N->hasOneUse() &&*/ !ExprMap.insert(std::make_pair(N, notIn)).second)
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return; // Already selected.
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return; // Already selected.
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SDNode *Node = N.Val;
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SDNode *Node = N.Val;
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switch (N.getOpcode()) {
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switch (opcode) {
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default:
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default:
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Node->dump(); std::cerr << "\n";
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Node->dump(); std::cerr << "\n";
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@ -1267,16 +1269,24 @@ void ISel::Select(SDOperand N) {
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Select(Chain);
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Select(Chain);
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Tmp1 = SelectExpr(Value); //value
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Tmp1 = SelectExpr(Value); //value
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switch(Value.getValueType()) {
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default: assert(0 && "unknown Type in store");
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if (opcode == ISD::STORE) {
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case MVT::i64: Opc = Alpha::STQ; break;
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switch(Value.getValueType()) {
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case MVT::f64: Opc = Alpha::STT; break;
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default: assert(0 && "unknown Type in store");
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case MVT::f32: Opc = Alpha::STS; break;
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case MVT::i64: Opc = Alpha::STQ; break;
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case MVT::i1: //FIXME: DAG does not promote this load
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case MVT::f64: Opc = Alpha::STT; break;
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case MVT::i8: Opc = Alpha::STB; break;
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case MVT::f32: Opc = Alpha::STS; break;
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case MVT::i16: Opc = Alpha::STW; break;
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}
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case MVT::i32: Opc = Alpha::STL; break;
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} else { //ISD::TRUNCSTORE
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switch(cast<MVTSDNode>(Node)->getExtraValueType()) {
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default: assert(0 && "unknown Type in store");
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case MVT::i1: //FIXME: DAG does not promote this load
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case MVT::i8: Opc = Alpha::STB; break;
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case MVT::i16: Opc = Alpha::STW; break;
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case MVT::i32: Opc = Alpha::STL; break;
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}
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}
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}
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if (Address.getOpcode() == ISD::GlobalAddress)
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if (Address.getOpcode() == ISD::GlobalAddress)
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{
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{
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AlphaLowering.restoreGP(BB);
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AlphaLowering.restoreGP(BB);
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@ -358,7 +358,7 @@ def ITOFT : FPForm<0x14, 0x024, (ops FPRC:$RC, GPRC:$RA), "itoft $RA,$RC">; //In
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//CVTQL F-P 17.030 Convert quadword to longword
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//CVTQL F-P 17.030 Convert quadword to longword
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def CVTQS : FPForm<0x16, 0x0BC, (ops FPRC:$RC, FPRC:$RA), "cvtqs $RA,$RC">; //Convert quadword to S_floating
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def CVTQS : FPForm<0x16, 0x0BC, (ops FPRC:$RC, FPRC:$RA), "cvtqs $RA,$RC">; //Convert quadword to S_floating
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def CVTQT : FPForm<0x16, 0x0BE, (ops FPRC:$RC, FPRC:$RA), "cvtqt $RA,$RC">; //Convert quadword to T_floating
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def CVTQT : FPForm<0x16, 0x0BE, (ops FPRC:$RC, FPRC:$RA), "cvtqt $RA,$RC">; //Convert quadword to T_floating
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def CVTST : FPForm<0x16, 0x2AC, (ops FPRC:$RC, FPRC:$RA), "cvtst $RA,$RC">; //Convert S_floating to T_floating
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def CVTST : FPForm<0x16, 0x2AC, (ops FPRC:$RC, FPRC:$RA), "cvtsts $RA,$RC">; //Convert S_floating to T_floating (use completion, may not have function code for that set right)
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def CVTTQ : FPForm<0x16, 0x0AF, (ops FPRC:$RC, FPRC:$RA), "cvttq $RA,$RC">; //Convert T_floating to quadword
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def CVTTQ : FPForm<0x16, 0x0AF, (ops FPRC:$RC, FPRC:$RA), "cvttq $RA,$RC">; //Convert T_floating to quadword
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def CVTTS : FPForm<0x16, 0x2AC, (ops FPRC:$RC, FPRC:$RA), "cvtts $RA,$RC">; //Convert T_floating to S_floating
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def CVTTS : FPForm<0x16, 0x2AC, (ops FPRC:$RC, FPRC:$RA), "cvtts $RA,$RC">; //Convert T_floating to S_floating
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