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Fix LDM_RET schedule itinery.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113435 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -122,6 +122,15 @@ def CortexA8Itineraries : ProcessorItineraries<
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InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
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InstrStage<1, [A8_LdSt0]>]>,
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//
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// Load multiple plus branch
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InstrItinData<IIC_iLoadmBr , [InstrStage<2, [A8_Issue], 0>,
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InstrStage<2, [A8_Pipe0], 0>,
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InstrStage<2, [A8_Pipe1]>,
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InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
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InstrStage<1, [A8_LdSt0]>,
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InstrStage<1, [A8_Pipe0, A8_Pipe1]>]>,
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// Integer store pipeline
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//
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// use A8_Issue to enforce the 1 load/store per cycle limit
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