diff --git a/lib/Target/XCore/XCoreTargetObjectFile.cpp b/lib/Target/XCore/XCoreTargetObjectFile.cpp index 9415f5127dc..767611218a9 100644 --- a/lib/Target/XCore/XCoreTargetObjectFile.cpp +++ b/lib/Target/XCore/XCoreTargetObjectFile.cpp @@ -9,7 +9,7 @@ #include "XCoreTargetObjectFile.h" #include "XCoreSubtarget.h" -#include "llvm/MC/MCSectionELF.h" +#include "MCSectionXCore.h" #include "llvm/Target/TargetMachine.h" using namespace llvm; @@ -17,12 +17,22 @@ using namespace llvm; void XCoreTargetObjectFile::Initialize(MCContext &Ctx, const TargetMachine &TM){ TargetLoweringObjectFileELF::Initialize(Ctx, TM); - DataSection = getELFSection(".dp.data", MCSectionELF::SHT_PROGBITS, - MCSectionELF::SHF_ALLOC | MCSectionELF::SHF_WRITE, - SectionKind::getDataRel()); - BSSSection = getELFSection(".dp.bss", MCSectionELF::SHT_NOBITS, - MCSectionELF::SHF_ALLOC | MCSectionELF::SHF_WRITE, - SectionKind::getBSS()); + DataSection = + MCSectionXCore::Create(".dp.data", MCSectionELF::SHT_PROGBITS, + MCSectionELF::SHF_ALLOC | MCSectionELF::SHF_WRITE | + MCSectionXCore::SHF_DP_SECTION, + SectionKind::getDataRel(), false, getContext()); + BSSSection = + MCSectionXCore::Create(".dp.bss", MCSectionELF::SHT_NOBITS, + MCSectionELF::SHF_ALLOC | MCSectionELF::SHF_WRITE | + MCSectionXCore::SHF_DP_SECTION, + SectionKind::getBSS(), false, getContext()); + + // For now, disable lowering of mergable sections, just drop everything into + // ReadOnly. + MergeableConst4Section = 0; + MergeableConst8Section = 0; + MergeableConst16Section = 0; // TLS globals are lowered in the backend to arrays indexed by the current // thread id. After lowering they require no special handling by the linker @@ -31,13 +41,15 @@ void XCoreTargetObjectFile::Initialize(MCContext &Ctx, const TargetMachine &TM){ TLSBSSSection = BSSSection; if (TM.getSubtarget().isXS1A()) - // FIXME: Why is this writable ("datarel")??? - ReadOnlySection = - getELFSection(".dp.rodata", MCSectionELF::SHT_PROGBITS, - MCSectionELF::SHF_ALLOC | MCSectionELF::SHF_WRITE, - SectionKind::getDataRel()); + ReadOnlySection = // FIXME: Why is this a writable section for XS1A? + MCSectionXCore::Create(".dp.rodata", MCSectionELF::SHT_PROGBITS, + MCSectionELF::SHF_ALLOC | MCSectionELF::SHF_WRITE | + MCSectionXCore::SHF_DP_SECTION, + SectionKind::getDataRel(), false, getContext()); else ReadOnlySection = - getELFSection(".cp.rodata", MCSectionELF::SHT_PROGBITS, - MCSectionELF::SHF_ALLOC, SectionKind::getReadOnly()); + MCSectionXCore::Create(".cp.rodata", MCSectionELF::SHT_PROGBITS, + MCSectionELF::SHF_ALLOC | + MCSectionXCore::SHF_CP_SECTION, + SectionKind::getReadOnly(), false, getContext()); } diff --git a/test/CodeGen/XCore/globals.ll b/test/CodeGen/XCore/globals.ll index 07d56a1a3a6..c3d5f52e68c 100644 --- a/test/CodeGen/XCore/globals.ll +++ b/test/CodeGen/XCore/globals.ll @@ -1,5 +1,4 @@ ; RUN: llvm-as < %s | llc -march=xcore -mcpu=xs1b-generic | FileCheck %s -; XFAIL: * define i32 *@addr_G1() { entry: diff --git a/test/CodeGen/XCore/tls.ll b/test/CodeGen/XCore/tls.ll index d645608c48f..8f35268d464 100644 --- a/test/CodeGen/XCore/tls.ll +++ b/test/CodeGen/XCore/tls.ll @@ -1,5 +1,4 @@ ; RUN: llvm-as < %s | llc -march=xcore -mcpu=xs1b-generic | FileCheck %s -; XFAIL: * define i32 *@addr_G() { entry: