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Add the simple PPC integer constraints
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26027 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1035,3 +1035,44 @@ getRegForInlineAsmConstraint(const std::string &Constraint) const {
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// Handle explicit register names.
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return TargetLowering::getRegForInlineAsmConstraint(Constraint);
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}
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// isOperandValidForConstraint
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bool PPCTargetLowering::
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isOperandValidForConstraint(SDOperand Op, char Letter) {
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switch (Letter) {
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default: break;
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case 'I':
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case 'J':
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case 'K':
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case 'L':
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case 'M':
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case 'N':
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case 'O':
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case 'P': {
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if (!isa<ConstantSDNode>(Op)) return false; // Must be an immediate.
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unsigned Value = cast<ConstantSDNode>(Op)->getValue();
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switch (Letter) {
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default: assert(0 && "Unknown constraint letter!");
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case 'I': // "I" is a signed 16-bit constant.
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return (short)Value == (int)Value;
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case 'J': // "J" is a constant with only the high-order 16 bits nonzero.
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case 'L': // "L" is a signed 16-bit constant shifted left 16 bits.
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return (short)Value == 0;
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case 'K': // "K" is a constant with only the low-order 16 bits nonzero.
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return (Value >> 16) == 0;
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case 'M': // "M" is a constant that is greater than 31.
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return Value > 31;
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case 'N': // "N" is a positive constant that is an exact power of two.
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return (int)Value > 0 && isPowerOf2_32(Value);
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case 'O': // "O" is the constant zero.
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return Value == 0;
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case 'P': // "P" is a constant whose negation is a signed 16-bit constant.
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return (short)-Value == (int)-Value;
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}
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break;
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}
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}
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// Handle standard constraint letters.
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return TargetLowering::isOperandValidForConstraint(Op, Letter);
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}
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@ -99,7 +99,7 @@ namespace llvm {
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std::vector<unsigned>
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getRegForInlineAsmConstraint(const std::string &Constraint) const;
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bool isOperandValidForConstraint(SDOperand Op, char ConstraintLetter);
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};
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}
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