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Evan implemented these.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47828 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2008-03-02 18:05:14 +00:00
parent 3be4893dce
commit 767486b1d5
3 changed files with 34 additions and 53 deletions
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26
lib/Target/X86/README-SSE.txt
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@ -131,32 +131,6 @@ feasible.
//===---------------------------------------------------------------------===//
Teach the coalescer to commute 2-addr instructions, allowing us to eliminate
the reg-reg copy in this example:
float foo(int *x, float *y, unsigned c) {
float res = 0.0;
unsigned i;
for (i = 0; i < c; i++) {
float xx = (float)x[i];
xx = xx * y[i];
xx += res;
res = xx;
}
return res;
}
LBB_foo_3: # no_exit
cvtsi2ss %XMM0, DWORD PTR [%EDX + 4*%ESI]
mulss %XMM0, DWORD PTR [%EAX + 4*%ESI]
addss %XMM0, %XMM1
inc %ESI
cmp %ESI, %ECX
**** movaps %XMM1, %XMM0
jb LBB_foo_3 # no_exit
//===---------------------------------------------------------------------===//
Codegen:
if (copysign(1.0, x) == copysign(1.0, y))
into:

27
lib/Target/X86/README.txt
View File

@ -933,33 +933,6 @@ _test:
//===---------------------------------------------------------------------===//
This is a "commutable two-address" register coallescing deficiency:
define <4 x float> @test1(<4 x float> %V) {
entry:
%tmp8 = shufflevector <4 x float> %V, <4 x float> undef,
<4 x i32> < i32 3, i32 2, i32 1, i32 0 >
%add = add <4 x float> %tmp8, %V
ret <4 x float> %add
}
this codegens to:
_test1:
pshufd $27, %xmm0, %xmm1
addps %xmm0, %xmm1
movaps %xmm1, %xmm0
ret
instead of:
_test1:
pshufd $27, %xmm0, %xmm1
addps %xmm1, %xmm0
ret
//===---------------------------------------------------------------------===//
Leaf functions that require one 4-byte spill slot have a prolog like this:
_foo:

34
test/CodeGen/X86/coalescer-commute2.ll Normal file
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@ -0,0 +1,34 @@
; RUN: llvm-as < %s | llc -march=x86-64 | grep paddw | count 2
; RUN: llvm-as < %s | llc -march=x86-64 | not grep mov
; The 2-addr pass should ensure that identical code is produced for these functions
; no extra copy should be generated.
define <2 x i64> @test1(<2 x i64> %x, <2 x i64> %y) nounwind {
entry:
%tmp6 = bitcast <2 x i64> %y to <8 x i16> ; <<8 x i16>> [#uses=1]
%tmp8 = bitcast <2 x i64> %x to <8 x i16> ; <<8 x i16>> [#uses=1]
%tmp9 = add <8 x i16> %tmp8, %tmp6 ; <<8 x i16>> [#uses=1]
%tmp10 = bitcast <8 x i16> %tmp9 to <2 x i64> ; <<2 x i64>> [#uses=1]
ret <2 x i64> %tmp10
}
define <2 x i64> @test2(<2 x i64> %x, <2 x i64> %y) nounwind {
entry:
%tmp6 = bitcast <2 x i64> %x to <8 x i16> ; <<8 x i16>> [#uses=1]
%tmp8 = bitcast <2 x i64> %y to <8 x i16> ; <<8 x i16>> [#uses=1]
%tmp9 = add <8 x i16> %tmp8, %tmp6 ; <<8 x i16>> [#uses=1]
%tmp10 = bitcast <8 x i16> %tmp9 to <2 x i64> ; <<2 x i64>> [#uses=1]
ret <2 x i64> %tmp10
}
; The coalescer should commute the add to avoid a copy.
define <4 x float> @test3(<4 x float> %V) {
entry:
%tmp8 = shufflevector <4 x float> %V, <4 x float> undef,
<4 x i32> < i32 3, i32 2, i32 1, i32 0 >
%add = add <4 x float> %tmp8, %V
ret <4 x float> %add
}