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Modified the Intel instruction tables to include

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versions of CALL and JMP with segmented addresses
provided in-line, as pairs of immediates.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81818 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sean Callanan 2009-09-15 00:35:17 +00:00
parent ca9c42c4da
commit 76f14be685
2 changed files with 37 additions and 4 deletions
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18
lib/Target/X86/X86InstrFormats.td
View File

@ -143,6 +143,24 @@ class FpI_<dag outs, dag ins, FPFormat fp, list<dag> pattern>
let Pattern = pattern;
}
// Templates for instructions that use a 16- or 32-bit segmented address as
// their only operand: lcall (FAR CALL) and ljmp (FAR JMP)
//
// Iseg16 - 16-bit segment selector, 16-bit offset
// Iseg32 - 16-bit segment selector, 32-bit offset
class Iseg16 <bits<8> o, Format f, dag outs, dag ins, string asm,
list<dag> pattern> : X86Inst<o, f, NoImm, outs, ins, asm> {
let Pattern = pattern;
let CodeSize = 3;
}
class Iseg32 <bits<8> o, Format f, dag outs, dag ins, string asm,
list<dag> pattern> : X86Inst<o, f, NoImm, outs, ins, asm> {
let Pattern = pattern;
let CodeSize = 3;
}
// SSE1 Instruction Templates:
//
// SSI - SSE1 instructions with XS prefix.

23
lib/Target/X86/X86InstrInfo.td
View File

@ -584,9 +584,17 @@ let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in {
[(brind GR32:$dst)]>;
def JMP32m : I<0xFF, MRM4m, (outs), (ins i32mem:$dst), "jmp{l}\t{*}$dst",
[(brind (loadi32 addr:$dst))]>;
def FARJMP16 : I<0xFF, MRM5m, (outs), (ins opaque32mem:$dst),
def FARJMP16i : Iseg16<0xEA, RawFrm, (outs),
(ins i16imm:$seg, i16imm:$off),
"ljmp{w}\t$seg, $off", []>, OpSize;
def FARJMP32i : Iseg32<0xEA, RawFrm, (outs),
(ins i16imm:$seg, i32imm:$off),
"ljmp{l}\t$seg, $off", []>;
def FARJMP16m : I<0xFF, MRM5m, (outs), (ins opaque32mem:$dst),
"ljmp{w}\t{*}$dst", []>, OpSize;
def FARJMP32 : I<0xFF, MRM5m, (outs), (ins opaque48mem:$dst),
def FARJMP32m : I<0xFF, MRM5m, (outs), (ins opaque48mem:$dst),
"ljmp{l}\t{*}$dst", []>;
}
@ -669,9 +677,16 @@ let isCall = 1 in
def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst, variable_ops),
"call\t{*}$dst", [(X86call (loadi32 addr:$dst))]>;
def FARCALL16 : I<0xFF, MRM3m, (outs), (ins opaque32mem:$dst),
def FARCALL16i : Iseg16<0x9A, RawFrm, (outs),
(ins i16imm:$seg, i16imm:$off),
"lcall{w}\t$seg, $off", []>, OpSize;
def FARCALL32i : Iseg32<0x9A, RawFrm, (outs),
(ins i16imm:$seg, i32imm:$off),
"lcall{l}\t$seg, $off", []>;
def FARCALL16m : I<0xFF, MRM3m, (outs), (ins opaque32mem:$dst),
"lcall{w}\t{*}$dst", []>, OpSize;
def FARCALL32 : I<0xFF, MRM3m, (outs), (ins opaque48mem:$dst),
def FARCALL32m : I<0xFF, MRM3m, (outs), (ins opaque48mem:$dst),
"lcall{l}\t{*}$dst", []>;
}