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R600/SI: Fix encoding error from glc bit on VI SMRD instructions

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229608 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault 2015-02-18 02:10:40 +00:00
parent 9e39c99180
commit 76f78b9ac2
1 changed files with 5 additions and 1 deletions
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6
lib/Target/R600/SIInstrInfo.td
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@ -576,7 +576,11 @@ multiclass SMRD_m <bits<5> op, string opName, bit imm, dag outs, dag ins,
def _si : SMRD_Real_si <op, opName, imm, outs, ins, asm>;
def _vi : SMRD_Real_vi <{0, 0, 0, op}, opName, imm, outs, ins, asm>;
// glc is only applicable to scalar stores, which are not yet
// implemented.
let glc = 0 in {
def _vi : SMRD_Real_vi <{0, 0, 0, op}, opName, imm, outs, ins, asm>;
}
}
multiclass SMRD_Helper <bits<5> op, string opName, RegisterClass baseClass,