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Handle more SELECT corner cases considering legalize types, probabily wont work with
the default legalizer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54249 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -85,6 +85,12 @@ MipsTargetLowering(MipsTargetMachine &TM): TargetLowering(TM)
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setLoadXAction(ISD::ZEXTLOAD, MVT::i1, Promote);
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setLoadXAction(ISD::SEXTLOAD, MVT::i1, Promote);
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// Used by legalize types to correctly generate the setcc result.
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// Without this, every float setcc comes with a AND with the result,
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// we don't want this, since the fpcmp result goes to a flag register,
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// which is used implicitly by brcond and select operations.
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AddPromotedToType(ISD::SETCC, MVT::i1, MVT::i32);
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// Mips Custom Operations
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setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
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setOperationAction(ISD::GlobalTLSAddress, MVT::i32, Custom);
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@ -97,6 +103,11 @@ MipsTargetLowering(MipsTargetMachine &TM): TargetLowering(TM)
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setOperationAction(ISD::SETCC, MVT::f32, Custom);
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setOperationAction(ISD::BRCOND, MVT::Other, Custom);
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// We custom lower AND to handle the case where the DAG contain 'ands'
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// setcc results with fp operands. This is necessary since the result
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// from these are in a flag register (FCR31).
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setOperationAction(ISD::AND, MVT::i32, Custom);
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// Operations not directly supported by Mips.
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setOperationAction(ISD::BR_JT, MVT::Other, Expand);
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setOperationAction(ISD::BR_CC, MVT::Other, Expand);
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@ -148,6 +159,7 @@ LowerOperation(SDValue Op, SelectionDAG &DAG)
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{
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switch (Op.getOpcode())
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{
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case ISD::AND: return LowerAND(Op, DAG);
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case ISD::BRCOND: return LowerBRCOND(Op, DAG);
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case ISD::CALL: return LowerCALL(Op, DAG);
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case ISD::ConstantPool: return LowerConstantPool(Op, DAG);
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@ -346,6 +358,26 @@ MipsTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
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// Misc Lower Operation implementation
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//===----------------------------------------------------------------------===//
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SDValue MipsTargetLowering::
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LowerAND(SDValue Op, SelectionDAG &DAG)
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{
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SDValue LHS = Op.getOperand(0);
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SDValue RHS = Op.getOperand(1);
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if (LHS.getOpcode() != MipsISD::FPCmp || RHS.getOpcode() != MipsISD::FPCmp)
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return Op;
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SDValue True = DAG.getConstant(1, MVT::i32);
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SDValue False = DAG.getConstant(0, MVT::i32);
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SDValue LSEL = DAG.getNode(MipsISD::FPSelectCC, True.getValueType(),
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LHS, True, False, LHS.getOperand(2));
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SDValue RSEL = DAG.getNode(MipsISD::FPSelectCC, True.getValueType(),
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RHS, True, False, RHS.getOperand(2));
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return DAG.getNode(ISD::AND, MVT::i32, LSEL, RSEL);
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}
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SDValue MipsTargetLowering::
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LowerBRCOND(SDValue Op, SelectionDAG &DAG)
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{
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@ -353,18 +385,12 @@ LowerBRCOND(SDValue Op, SelectionDAG &DAG)
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// the block to branch to if the condition is true.
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SDValue Chain = Op.getOperand(0);
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SDValue Dest = Op.getOperand(2);
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SDValue CondRes;
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if (Op.getOperand(1).getOpcode() == ISD::AND) {
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CondRes = Op.getOperand(1).getOperand(0);
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if (CondRes.getOpcode() != MipsISD::FPCmp)
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return Op;
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} else if (Op.getOperand(1).getOpcode() == MipsISD::FPCmp)
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CondRes = Op.getOperand(1);
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else
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if (Op.getOperand(1).getOpcode() != MipsISD::FPCmp)
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return Op;
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SDValue CCNode = CondRes.getOperand(2);
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SDValue CondRes = Op.getOperand(1);
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SDValue CCNode = CondRes.getOperand(2);
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Mips::CondCode CC = (Mips::CondCode)cast<ConstantSDNode>(CCNode)->getValue();
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SDValue BrCode = DAG.getConstant(GetFPBranchCodeFromCond(CC), MVT::i32);
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@ -394,25 +420,15 @@ LowerSELECT(SDValue Op, SelectionDAG &DAG)
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SDValue True = Op.getOperand(1);
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SDValue False = Op.getOperand(2);
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// this can be a fp select but with a setcc comming from a
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// integer compare.
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if (Cond.getOpcode() == ISD::SETCC)
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if (Cond.getOperand(0).getValueType().isInteger())
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return DAG.getNode(MipsISD::SelectCC, True.getValueType(),
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Cond, True, False);
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// if the incomming condition comes from fpcmp, the select
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// operation must use FPSelectCC, otherwise SelectCC.
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if (Cond.getOpcode() != MipsISD::FPCmp)
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return DAG.getNode(MipsISD::SelectCC, True.getValueType(),
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Cond, True, False);
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// Otherwise we're dealing with floating point compare.
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SDValue CondRes;
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if (Cond.getOpcode() == ISD::AND)
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CondRes = Cond.getOperand(0);
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else if (Cond.getOpcode() == MipsISD::FPCmp)
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CondRes = Cond;
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else
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assert(0 && "Incoming condition flag unknown");
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SDValue CCNode = CondRes.getOperand(2);
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SDValue CCNode = Cond.getOperand(2);
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return DAG.getNode(MipsISD::FPSelectCC, True.getValueType(),
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CondRes, True, False, CCNode);
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Cond, True, False, CCNode);
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}
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SDValue MipsTargetLowering::
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@ -91,17 +91,18 @@ namespace llvm {
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bool IsInSmallSection(unsigned Size);
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// Lower Operand specifics
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SDValue LowerRET(SDValue Op, SelectionDAG &DAG);
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SDValue LowerAND(SDValue Op, SelectionDAG &DAG);
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SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG);
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SDValue LowerCALL(SDValue Op, SelectionDAG &DAG);
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SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG);
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SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG);
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SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG);
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SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG);
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SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG);
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SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG);
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SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG);
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SDValue LowerRET(SDValue Op, SelectionDAG &DAG);
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SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG);
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SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG);
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SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG);
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SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG);
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virtual MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI,
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MachineBasicBlock *MBB);
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