Don't try to verify LiveIntervals for physical registers.

When a physical register is in use, some alias of that register has a live
interval with a relevant live range. That is the sad state of intervals after
physreg coalescing of subregs, and it is good enough for correct register
allocation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110452 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2010-08-06 18:04:14 +00:00
parent 55e9587469
commit 775aa22da2

View File

@ -630,8 +630,9 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) {
else
addRegWithSubRegs(regsDefined, Reg);
// Check LiveInts for a live range.
if (LiveInts && !LiveInts->isNotInMIMap(MI)) {
// Check LiveInts for a live range, but only for virtual registers.
if (LiveInts && TargetRegisterInfo::isVirtualRegister(Reg) &&
!LiveInts->isNotInMIMap(MI)) {
SlotIndex DefIdx = LiveInts->getInstructionIndex(MI).getDefIndex();
if (LiveInts->hasInterval(Reg)) {
const LiveInterval &LI = LiveInts->getInterval(Reg);
@ -642,16 +643,11 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) {
*OS << "Valno " << LR->valno->id << " is not defined at "
<< DefIdx << " in " << LI << '\n';
}
if (LR->start != DefIdx) {
report("Live range doesn't start at def", MO, MONum);
LR->print(*OS);
*OS << " should start at " << DefIdx << " in " << LI << '\n';
}
} else {
report("No live range at def", MO, MONum);
*OS << DefIdx << " is not live in " << LI << '\n';
}
} else if (TargetRegisterInfo::isVirtualRegister(Reg)) {
} else {
report("Virtual register has no Live interval", MO, MONum);
}
}