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Instead of a vector load, shuffle and then extract an element. Load the element from address with an offset.

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pshufd $1, (%rdi), %xmm0
        movd %xmm0, %eax
=>
        movl 4(%rdi), %eax


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51026 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2008-05-13 08:35:03 +00:00
parent 6513c1bf90
commit 77f0b7a50a
9 changed files with 115 additions and 97 deletions
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29
lib/Target/X86/README-SSE.txt
View File

@@ -545,35 +545,6 @@ swizzle:
//===---------------------------------------------------------------------===//
These functions should produce the same code:
#include <emmintrin.h>
typedef long long __m128i __attribute__ ((__vector_size__ (16)));
int foo(__m128i* val) {
return __builtin_ia32_vec_ext_v4si(*val, 1);
}
int bar(__m128i* val) {
union vs {
__m128i *_v;
int* _s;
} v = {val};
return v._s[1];
}
We currently produce (with -m64):
_foo:
pshufd $1, (%rdi), %xmm0
movd %xmm0, %eax
ret
_bar:
movl 4(%rdi), %eax
ret
//===---------------------------------------------------------------------===//
We should materialize vector constants like "all ones" and "signbit" with
code like:

22
lib/Target/X86/X86ISelLowering.cpp
View File

@@ -6182,26 +6182,6 @@ void X86TargetLowering::computeMaskedBitsForTargetNode(const SDOperand Op,
}
}
/// getShuffleScalarElt - Returns the scalar element that will make up the ith
/// element of the result of the vector shuffle.
static SDOperand getShuffleScalarElt(SDNode *N, unsigned i, SelectionDAG &DAG) {
MVT::ValueType VT = N->getValueType(0);
SDOperand PermMask = N->getOperand(2);
unsigned NumElems = PermMask.getNumOperands();
SDOperand V = (i < NumElems) ? N->getOperand(0) : N->getOperand(1);
i %= NumElems;
if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) {
return (i == 0)
? V.getOperand(0) : DAG.getNode(ISD::UNDEF, MVT::getVectorElementType(VT));
} else if (V.getOpcode() == ISD::VECTOR_SHUFFLE) {
SDOperand Idx = PermMask.getOperand(i);
if (Idx.getOpcode() == ISD::UNDEF)
return DAG.getNode(ISD::UNDEF, MVT::getVectorElementType(VT));
return getShuffleScalarElt(V.Val,cast<ConstantSDNode>(Idx)->getValue(),DAG);
}
return SDOperand();
}
/// isGAPlusOffset - Returns true (and the GlobalValue and the offset) if the
/// node is a GlobalAddress + offset.
bool X86TargetLowering::isGAPlusOffset(SDNode *N,
@@ -6240,7 +6220,7 @@ static bool EltsFromConsecutiveLoads(SDNode *N, SDOperand PermMask,
}
unsigned Index = cast<ConstantSDNode>(Idx)->getValue();
SDOperand Elt = getShuffleScalarElt(N, Index, DAG);
SDOperand Elt = DAG.getShuffleScalarElt(N, Index);
if (!Elt.Val ||
(Elt.getOpcode() != ISD::UNDEF && !ISD::isNON_EXTLoad(Elt.Val)))
return false;