diff --git a/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp
index c6cda56f7dd..608f352ddf1 100644
--- a/lib/Target/X86/X86Subtarget.cpp
+++ b/lib/Target/X86/X86Subtarget.cpp
@@ -204,7 +204,6 @@ static const char *GetCurrentX86CPU() {
   unsigned Family = 0;
   unsigned Model  = 0;
   DetectFamilyModel(EAX, Family, Model);
-  bool HasSSE42 = (ECX >> 19) & 0x1;
 
   X86::GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
   bool Em64T = (EDX >> 29) & 0x1;
@@ -252,10 +251,10 @@ static const char *GetCurrentX86CPU() {
         case 4:
         case 6: // same as 4, but 65nm
           return (Em64T) ? "nocona" : "prescott";
+        case 26:
+          return "corei7";
         case 28:
-          // Intel Atom, and Core i7 both have this model.
-          // Atom has SSSE3, Core i7 has SSE4.2
-          return (HasSSE42) ? "corei7" : "atom";
+          return "atom";
         default:
           return (Em64T) ? "x86-64" : "pentium4";
         }