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Enable machine code verification after PreSched2 passes.

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The late scheduler depends on accurate liveness information if it is
breaking anti-dependencies, so we should be able to verify it.

Relax the terminator checking in the machine code verifier so it can
handle the basic blocks created by if conversion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153614 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2012-03-28 23:31:15 +00:00
parent 3bb17380b1
commit 78811669d5
2 changed files with 4 additions and 2 deletions
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4
lib/CodeGen/MachineVerifier.cpp
View File

@ -609,7 +609,9 @@ void MachineVerifier::visitMachineInstrBefore(const MachineInstr *MI) {
}
// Ensure non-terminators don't follow terminators.
if (MI->isTerminator()) {
// Ignore predicated terminators formed by if conversion.
// FIXME: If conversion shouldn't need to violate this rule.
if (MI->isTerminator() && !TII->isPredicated(MI)) {
if (!FirstTerminator)
FirstTerminator = MI;
} else if (FirstTerminator) {

2
lib/CodeGen/Passes.cpp
View File

@ -398,7 +398,7 @@ void TargetPassConfig::addMachinePasses() {
// Run pre-sched2 passes.
if (addPreSched2())
printNoVerify("After PreSched2 passes");
printAndVerify("After PreSched2 passes");
// Second pass scheduler.
if (getOptLevel() != CodeGenOpt::None) {