From 792e1f6df9d70970b5f658d56344ded87f3d7b42 Mon Sep 17 00:00:00 2001
From: Evan Cheng <evan.cheng@apple.com>
Date: Wed, 30 Sep 2009 08:53:01 +0000
Subject: [PATCH] Add a option which would move ld/st multiple pass before
 post-alloc scheduling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83145 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/ARM/ARMTargetMachine.cpp | 17 ++++++++++++++++-
 lib/Target/ARM/ARMTargetMachine.h   |  1 +
 2 files changed, 17 insertions(+), 1 deletion(-)

diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp
index dcb64c5131c..ef42bd20caf 100644
--- a/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/lib/Target/ARM/ARMTargetMachine.cpp
@@ -22,6 +22,10 @@
 #include "llvm/Target/TargetRegistry.h"
 using namespace llvm;
 
+static cl::opt<bool>
+LdStBeforeSched("ldstopti-before-sched2", cl::Hidden,
+            cl::desc("Move ld / st multiple pass before postalloc scheduling"));
+
 static const MCAsmInfo *createMCAsmInfo(const Target &T,
                                         const StringRef &TT) {
   Triple TheTriple(TT);
@@ -101,11 +105,22 @@ bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM,
   return true;
 }
 
+bool ARMBaseTargetMachine::addPreSched2(PassManagerBase &PM,
+                                        CodeGenOpt::Level OptLevel) {
+  // FIXME: temporarily disabling load / store optimization pass for Thumb1.
+  if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only())
+    if (LdStBeforeSched)
+      PM.add(createARMLoadStoreOptimizationPass());
+
+  return true;
+}
+
 bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
                                           CodeGenOpt::Level OptLevel) {
   // FIXME: temporarily disabling load / store optimization pass for Thumb1.
   if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only()) {
-    PM.add(createARMLoadStoreOptimizationPass());
+    if (!LdStBeforeSched)
+      PM.add(createARMLoadStoreOptimizationPass());
     PM.add(createIfConverterPass());
   }
 
diff --git a/lib/Target/ARM/ARMTargetMachine.h b/lib/Target/ARM/ARMTargetMachine.h
index 420305500f4..71a53488f16 100644
--- a/lib/Target/ARM/ARMTargetMachine.h
+++ b/lib/Target/ARM/ARMTargetMachine.h
@@ -50,6 +50,7 @@ public:
   // Pass Pipeline Configuration
   virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
   virtual bool addPreRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
+  virtual bool addPreSched2(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
   virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
   virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
                               MachineCodeEmitter &MCE);