MC/X86: Define explicit immediate forms of cmp{ss,sd,ps,pd}.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104622 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Dunbar 2010-05-25 18:40:53 +00:00
parent 04ac770be9
commit 79373680ed
2 changed files with 67 additions and 0 deletions

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@ -509,6 +509,17 @@ let mayLoad = 1 in
def CMPSSrm : SSIi8<0xC2, MRMSrcMem,
(outs FR32:$dst), (ins FR32:$src1, f32mem:$src, SSECC:$cc),
"cmp${cc}ss\t{$src, $dst|$dst, $src}", []>;
// Accept explicit immediate argument form instead of comparison code.
let isAsmParserOnly = 1 in {
def CMPSSrr_alt : SSIi8<0xC2, MRMSrcReg,
(outs FR32:$dst), (ins FR32:$src1, FR32:$src, i8imm:$src2),
"cmpss\t{$src2, $src, $dst|$dst, $src, $src2}", []>;
let mayLoad = 1 in
def CMPSSrm_alt : SSIi8<0xC2, MRMSrcMem,
(outs FR32:$dst), (ins FR32:$src1, f32mem:$src, i8imm:$src2),
"cmpss\t{$src2, $src, $dst|$dst, $src, $src2}", []>;
}
}
let Defs = [EFLAGS] in {
@ -1009,6 +1020,16 @@ let Constraints = "$src1 = $dst" in {
"cmp${cc}ps\t{$src, $dst|$dst, $src}",
[(set VR128:$dst, (int_x86_sse_cmp_ps VR128:$src1,
(memop addr:$src), imm:$cc))]>;
// Accept explicit immediate argument form instead of comparison code.
let isAsmParserOnly = 1 in {
def CMPPSrri_alt : PSIi8<0xC2, MRMSrcReg,
(outs VR128:$dst), (ins VR128:$src1, VR128:$src, i8imm:$src2),
"cmpps\t{$src2, $src, $dst|$dst, $src, $src}", []>;
def CMPPSrmi_alt : PSIi8<0xC2, MRMSrcMem,
(outs VR128:$dst), (ins VR128:$src1, f128mem:$src, i8imm:$src2),
"cmpps\t{$src2, $src, $dst|$dst, $src, $src}", []>;
}
}
def : Pat<(v4i32 (X86cmpps (v4f32 VR128:$src1), VR128:$src2, imm:$cc)),
(CMPPSrri (v4f32 VR128:$src1), (v4f32 VR128:$src2), imm:$cc)>;
@ -1298,6 +1319,17 @@ let mayLoad = 1 in
def CMPSDrm : SDIi8<0xC2, MRMSrcMem,
(outs FR64:$dst), (ins FR64:$src1, f64mem:$src, SSECC:$cc),
"cmp${cc}sd\t{$src, $dst|$dst, $src}", []>;
// Accept explicit immediate argument form instead of comparison code.
let isAsmParserOnly = 1 in {
def CMPSDrr_alt : SDIi8<0xC2, MRMSrcReg,
(outs FR64:$dst), (ins FR64:$src1, FR64:$src, i8imm:$src2),
"cmpsd\t{$src2, $src, $dst|$dst, $src, $src2}", []>;
let mayLoad = 1 in
def CMPSDrm_alt : SDIi8<0xC2, MRMSrcMem,
(outs FR64:$dst), (ins FR64:$src1, f64mem:$src, i8imm:$src2),
"cmpsd\t{$src2, $src, $dst|$dst, $src, $src2}", []>;
}
}
let Defs = [EFLAGS] in {
@ -1891,6 +1923,16 @@ let Constraints = "$src1 = $dst" in {
"cmp${cc}pd\t{$src, $dst|$dst, $src}",
[(set VR128:$dst, (int_x86_sse2_cmp_pd VR128:$src1,
(memop addr:$src), imm:$cc))]>;
// Accept explicit immediate argument form instead of comparison code.
let isAsmParserOnly = 1 in {
def CMPPDrri_alt : PDIi8<0xC2, MRMSrcReg,
(outs VR128:$dst), (ins VR128:$src1, VR128:$src, i8imm:$src2),
"cmppd\t{$src2, $src, $dst|$dst, $src, $src2}", []>;
def CMPPDrmi_alt : PDIi8<0xC2, MRMSrcMem,
(outs VR128:$dst), (ins VR128:$src1, f128mem:$src, i8imm:$src2),
"cmppd\t{$src2, $src, $dst|$dst, $src, $src2}", []>;
}
}
def : Pat<(v2i64 (X86cmppd (v2f64 VR128:$src1), VR128:$src2, imm:$cc)),
(CMPPDrri VR128:$src1, VR128:$src2, imm:$cc)>;

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@ -218,3 +218,28 @@ retl
// CHECK: cmovel %eax, %edx
// CHECK: encoding: [0x0f,0x44,0xd0]
cmovzl %eax,%edx
// CHECK: cmpps $0, %xmm0, %xmm1
// CHECK: encoding: [0x0f,0xc2,0xc8,0x00]
cmpps $0, %xmm0, %xmm1
// CHECK: cmpps $0, (%eax), %xmm1
// CHECK: encoding: [0x0f,0xc2,0x08,0x00]
cmpps $0, 0(%eax), %xmm1
// CHECK: cmppd $0, %xmm0, %xmm1
// CHECK: encoding: [0x66,0x0f,0xc2,0xc8,0x00]
cmppd $0, %xmm0, %xmm1
// CHECK: cmppd $0, (%eax), %xmm1
// CHECK: encoding: [0x66,0x0f,0xc2,0x08,0x00]
cmppd $0, 0(%eax), %xmm1
// CHECK: cmpss $0, %xmm0, %xmm1
// CHECK: encoding: [0xf3,0x0f,0xc2,0xc8,0x00]
cmpss $0, %xmm0, %xmm1
// CHECK: cmpss $0, (%eax), %xmm1
// CHECK: encoding: [0xf3,0x0f,0xc2,0x08,0x00]
cmpss $0, 0(%eax), %xmm1
// CHECK: cmpsd $0, %xmm0, %xmm1
// CHECK: encoding: [0xf2,0x0f,0xc2,0xc8,0x00]
cmpsd $0, %xmm0, %xmm1
// CHECK: cmpsd $0, (%eax), %xmm1
// CHECK: encoding: [0xf2,0x0f,0xc2,0x08,0x00]
cmpsd $0, 0(%eax), %xmm1