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[AArch64] Add v8.1a "Privileged Access Never" extension

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Reviewers: jmolloy

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8498


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235104 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Vladimir Sukharev 2015-04-16 15:20:51 +00:00
parent 90c9a16dbf
commit 798efb5b3a
4 changed files with 58 additions and 3 deletions
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13
lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
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@ -142,7 +142,10 @@ AArch64PRFM::PRFMMapper::PRFMMapper()
const AArch64NamedImmMapper::Mapping AArch64PState::PStateMapper::PStateMappings[] = {
{"spsel", SPSel, 0},
{"daifset", DAIFSet, 0},
{"daifclr", DAIFClr, 0}
{"daifclr", DAIFClr, 0},
// v8.1a "Privileged Access Never" extension-specific PStates
{"pan", PAN, AArch64::HasV8_1aOps},
};
AArch64PState::PStateMapper::PStateMapper()
@ -267,7 +270,10 @@ const AArch64NamedImmMapper::Mapping AArch64SysReg::MSRMapper::MSRMappings[] = {
{"icc_dir_el1", ICC_DIR_EL1, 0},
{"icc_sgi1r_el1", ICC_SGI1R_EL1, 0},
{"icc_asgi1r_el1", ICC_ASGI1R_EL1, 0},
{"icc_sgi0r_el1", ICC_SGI0R_EL1, 0}
{"icc_sgi0r_el1", ICC_SGI0R_EL1, 0},
// v8.1a "Privileged Access Never" extension-specific system registers
{"pan", PAN, AArch64::HasV8_1aOps},
};
AArch64SysReg::MSRMapper::MSRMapper() {
@ -756,6 +762,9 @@ const AArch64NamedImmMapper::Mapping AArch64SysReg::SysRegMapper::SysRegMappings
// Cyclone registers
{"cpm_ioacc_ctl_el3", CPM_IOACC_CTL_EL3, AArch64::ProcCyclone},
// v8.1a "Privileged Access Never" extension-specific system registers
{"pan", PAN, AArch64::HasV8_1aOps},
};
uint32_t

8
lib/Target/AArch64/Utils/AArch64BaseInfo.h
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@ -447,7 +447,10 @@ namespace AArch64PState {
Invalid = -1,
SPSel = 0x05,
DAIFSet = 0x1e,
DAIFClr = 0x1f
DAIFClr = 0x1f,
// v8.1a "Privileged Access Never" extension-specific PStates
PAN = 0x04,
};
struct PStateMapper : AArch64NamedImmMapper {
@ -1135,6 +1138,9 @@ namespace AArch64SysReg {
ICH_LR14_EL2 = 0xe66e, // 11 100 1100 1101 110
ICH_LR15_EL2 = 0xe66f, // 11 100 1100 1101 111
// v8.1a "Privileged Access Never" extension-specific system registers
PAN = 0xc213, // 11 000 0100 0010 011
// Cyclone specific system registers
CPM_IOACC_CTL_EL3 = 0xff90,
};

30
test/MC/AArch64/armv8.1a-pan.s Normal file
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@ -0,0 +1,30 @@
// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.1a -show-encoding < %s 2> %t | FileCheck %s
// RUN: FileCheck --check-prefix=CHECK-ERROR %s < %t
.text
msr pan, #0
// CHECK: msr PAN, #0 // encoding: [0x9f,0x40,0x00,0xd5]
msr pan, #1
// CHECK: msr PAN, #1 // encoding: [0x9f,0x41,0x00,0xd5]
msr pan, x5
// CHECK: msr PAN, x5 // encoding: [0x65,0x42,0x18,0xd5]
mrs x13, pan
// CHECK: mrs x13, PAN // encoding: [0x6d,0x42,0x38,0xd5]
msr pan, #-1
msr pan, #20
msr pan, w0
mrs w0, pan
// CHECK-ERROR: error: immediate must be an integer in range [0, 15].
// CHECK-ERROR: msr pan, #-1
// CHECK-ERROR: ^
// CHECK-ERROR: error: immediate must be an integer in range [0, 15].
// CHECK-ERROR: msr pan, #20
// CHECK-ERROR: ^
// CHECK-ERROR: error: immediate must be an integer in range [0, 15].
// CHECK-ERROR: msr pan, w0
// CHECK-ERROR: ^
// CHECK-ERROR: error: invalid operand for instruction
// CHECK-ERROR: mrs w0, pan
// CHECK-ERROR: ^

10
test/MC/Disassembler/AArch64/armv8.1a-pan.txt Normal file
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@ -0,0 +1,10 @@
# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.1a --disassemble < %s | FileCheck %s
0x9f,0x40,0x00,0xd5
0x9f,0x41,0x00,0xd5
0x65,0x42,0x18,0xd5
0x6d,0x42,0x38,0xd5
# CHECK: msr PAN, #0
# CHECK: msr PAN, #1
# CHECK: msr PAN, x5
# CHECK: mrs x13, PAN