From 79924eb6f5708a2ae36ba22b674b2d7bea3167e6 Mon Sep 17 00:00:00 2001 From: Owen Anderson Date: Thu, 4 Sep 2008 16:48:33 +0000 Subject: [PATCH] Fix the ordering of operands to the store (inverted relative to LLVM IR), and fix the testcase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55777 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86FastISel.cpp | 6 ++++-- test/CodeGen/X86/fast-isel-mem.ll | 2 +- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp index 51ef25a87c6..f46777cd517 100644 --- a/lib/Target/X86/X86FastISel.cpp +++ b/lib/Target/X86/X86FastISel.cpp @@ -157,10 +157,10 @@ bool X86FastISel::X86SelectStore(Instruction* I) { X86AddressMode AM; if (Op1) // Address is in register. - AM.Base.Reg = Op0; + AM.Base.Reg = Op1; else AM.GV = cast(V); - addFullAddress(BuildMI(MBB, TII.get(Opc)), AM); + addFullAddress(BuildMI(MBB, TII.get(Opc)), AM).addReg(Op0); return true; } @@ -255,6 +255,8 @@ X86FastISel::TargetSelectInstruction(Instruction *I) { default: break; case Instruction::Load: return X86SelectLoad(I); + case Instruction::Store: + return X86SelectStore(I); } return false; diff --git a/test/CodeGen/X86/fast-isel-mem.ll b/test/CodeGen/X86/fast-isel-mem.ll index 5c39fb40170..ca175c48bf3 100644 --- a/test/CodeGen/X86/fast-isel-mem.ll +++ b/test/CodeGen/X86/fast-isel-mem.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llc -fast-isel -mtriple=i386-apple-darwin -mattr=sse2 | \ -; RUN: grep mov | grep lazy_ptr | count 2 +; RUN: grep mov | grep lazy_ptr | count 1 @src = external global i32