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Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph
and into the ScheduleDAGInstrs class, so that they don't get destructed and re-constructed for each block. This fixes a compile-time hot spot in the post-pass scheduler. To help facilitate this, tidy and do some minor reorganization in the scheduler constructor functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62275 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -16,6 +16,7 @@
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#define LLVM_CODEGEN_SCHEDULEDAGINSTRS_H
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#include "llvm/CodeGen/ScheduleDAG.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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namespace llvm {
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class MachineLoopInfo;
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@@ -25,11 +26,22 @@ namespace llvm {
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const MachineLoopInfo &MLI;
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const MachineDominatorTree &MDT;
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/// Defs, Uses - Remember where defs and uses of each physical register
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/// are as we iterate upward through the instructions. This is allocated
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/// here instead of inside BuildSchedGraph to avoid the need for it to be
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/// initialized and destructed for each block.
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std::vector<SUnit *> Defs[TargetRegisterInfo::FirstVirtualRegister];
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std::vector<SUnit *> Uses[TargetRegisterInfo::FirstVirtualRegister];
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/// PendingLoads - Remember where unknown loads are after the most recent
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/// unknown store, as we iterate. As with Defs and Uses, this is here
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/// to minimize construction/destruction.
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std::vector<SUnit *> PendingLoads;
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public:
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ScheduleDAGInstrs(MachineBasicBlock *bb,
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const TargetMachine &tm,
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const MachineLoopInfo &mli,
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const MachineDominatorTree &mdt);
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explicit ScheduleDAGInstrs(MachineFunction &mf,
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const MachineLoopInfo &mli,
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const MachineDominatorTree &mdt);
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virtual ~ScheduleDAGInstrs() {}
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