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Support return of MMX values in 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65152 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1071,9 +1071,21 @@ LowerCallResult(SDValue Chain, SDValue InFlag, CallSDNode *TheCall,
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CopyVT = MVT::f80;
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}
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Chain = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(),
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CopyVT, InFlag).getValue(1);
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SDValue Val = Chain.getValue(0);
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SDValue Val;
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if (Is64Bit && CopyVT.isVector() && CopyVT.getSizeInBits() == 64) {
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// For x86-64, MMX values are returned in XMM0 and XMM1. Issue an
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// extract_vector_elt to i64 and then bit_convert it to the desired type.
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Chain = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(),
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MVT::v2i64, InFlag).getValue(1);
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Val = Chain.getValue(0);
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Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i64,
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Val, DAG.getConstant(0, MVT::i64));
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Val = DAG.getNode(ISD::BIT_CONVERT, dl, CopyVT, Val);
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} else {
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Chain = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(),
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CopyVT, InFlag).getValue(1);
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Val = Chain.getValue(0);
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}
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InFlag = Chain.getValue(2);
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if (CopyVT != VA.getValVT()) {
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13
test/CodeGen/X86/ret-mmx.ll
Normal file
13
test/CodeGen/X86/ret-mmx.ll
Normal file
@ -0,0 +1,13 @@
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; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx
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; rdar://6602459
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@g_v1di = external global <1 x i64>
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define void @test_v1di() nounwind {
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entry:
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%call = call <1 x i64> @return_v1di() ; <<1 x i64>> [#uses=0]
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store <1 x i64> %call, <1 x i64>* @g_v1di
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ret void
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}
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declare <1 x i64> @return_v1di()
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