diff --git a/lib/Target/PowerPC/PPC.h b/lib/Target/PowerPC/PPC.h index cd0f1d7c34c..16b1ea32650 100644 --- a/lib/Target/PowerPC/PPC.h +++ b/lib/Target/PowerPC/PPC.h @@ -15,12 +15,18 @@ #ifndef TARGET_POWERPC_H #define TARGET_POWERPC_H +#include + namespace llvm { class FunctionPass; +class TargetMachine; FunctionPass *createPowerPCPEI(); FunctionPass *createPPCBranchSelectionPass(); +FunctionPass *createPPC32ISelSimple(TargetMachine &TM); +FunctionPass *createPPC64ISelSimple(TargetMachine &TM); +FunctionPass *createPPC32AsmPrinter(std::ostream &OS,TargetMachine &TM); } // end namespace llvm; diff --git a/lib/Target/PowerPC/PPC32.h b/lib/Target/PowerPC/PPC32.h deleted file mode 100644 index c74208f8837..00000000000 --- a/lib/Target/PowerPC/PPC32.h +++ /dev/null @@ -1,31 +0,0 @@ -//===-- PPC32.h - Top-level interface for 32-bit PowerPC -----------*- C++ -*-// -// -// The LLVM Compiler Infrastructure -// -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file contains the entry points for global functions defined in the LLVM -// Darwin/PowerPC back-end. -// -//===----------------------------------------------------------------------===// - -#ifndef TARGET_POWERPC32_H -#define TARGET_POWERPC32_H - -#include "PowerPC.h" -#include - -namespace llvm { - -class FunctionPass; -class TargetMachine; - -FunctionPass *createPPC32ISelSimple(TargetMachine &TM); -FunctionPass *createPPC32AsmPrinter(std::ostream &OS,TargetMachine &TM); - -} // end namespace llvm; - -#endif diff --git a/lib/Target/PowerPC/PPC32ISelSimple.cpp b/lib/Target/PowerPC/PPC32ISelSimple.cpp index 96067f600ff..c9157ef8bd4 100644 --- a/lib/Target/PowerPC/PPC32ISelSimple.cpp +++ b/lib/Target/PowerPC/PPC32ISelSimple.cpp @@ -11,7 +11,6 @@ #include "PowerPC.h" #include "PowerPCInstrBuilder.h" #include "PowerPCInstrInfo.h" -#include "PPC32.h" #include "PPC32TargetMachine.h" #include "llvm/Constants.h" #include "llvm/DerivedTypes.h" diff --git a/lib/Target/PowerPC/PPC32JITInfo.h b/lib/Target/PowerPC/PPC32JITInfo.h index c887a2c0728..96fd389bb2f 100644 --- a/lib/Target/PowerPC/PPC32JITInfo.h +++ b/lib/Target/PowerPC/PPC32JITInfo.h @@ -24,12 +24,6 @@ namespace llvm { public: PPC32JITInfo(TargetMachine &tm) : PowerPCJITInfo(tm) {} - /// addPassesToJITCompile - Add passes to the specified pass manager to - /// implement a fast dynamic compiler for this target. Return true if this - /// is not supported for this target. - /// - virtual void addPassesToJITCompile(FunctionPassManager &PM); - /// replaceMachineCodeForFunction - Make it so that calling the function /// whose machine code is at OLD turns into a call to NEW, perhaps by /// overwriting OLD with a branch to NEW. This is used for self-modifying diff --git a/lib/Target/PowerPC/PPC32TargetMachine.cpp b/lib/Target/PowerPC/PPC32TargetMachine.cpp deleted file mode 100644 index 523c371fe3e..00000000000 --- a/lib/Target/PowerPC/PPC32TargetMachine.cpp +++ /dev/null @@ -1,115 +0,0 @@ -//===-- PowerPCTargetMachine.cpp - Define TargetMachine for PowerPC -------===// -// -// The LLVM Compiler Infrastructure -// -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// -//===----------------------------------------------------------------------===// - -#include "PPC32.h" -#include "PPC32JITInfo.h" -#include "PPC32TargetMachine.h" -#include "llvm/Module.h" -#include "llvm/PassManager.h" -#include "llvm/CodeGen/IntrinsicLowering.h" -#include "llvm/CodeGen/MachineFunction.h" -#include "llvm/CodeGen/Passes.h" -#include "llvm/Target/TargetOptions.h" -#include "llvm/Target/TargetMachineRegistry.h" -#include "llvm/Transforms/Scalar.h" -#include -using namespace llvm; - -namespace { - const std::string PPC32 = "Darwin/PowerPC"; - // Register the target - RegisterTarget - X("powerpc-darwin", " Darwin/PowerPC (experimental)"); -} - -/// PowerPCTargetMachine ctor - Create an ILP32 architecture model -/// -PPC32TargetMachine::PPC32TargetMachine(const Module &M, - IntrinsicLowering *IL) - : PowerPCTargetMachine(PPC32, IL, - TargetData(PPC32,false,4,4,4,4,4,4,2,1,4), - TargetFrameInfo(TargetFrameInfo::StackGrowsDown,16,-4), - PPC32JITInfo(*this)) {} - -/// addPassesToEmitAssembly - Add passes to the specified pass manager -/// to implement a static compiler for this target. -/// -bool PPC32TargetMachine::addPassesToEmitAssembly(PassManager &PM, - std::ostream &Out) { - // FIXME: Implement efficient support for garbage collection intrinsics. - PM.add(createLowerGCPass()); - - // FIXME: Implement the invoke/unwind instructions! - PM.add(createLowerInvokePass()); - - // FIXME: Implement the switch instruction in the instruction selector! - PM.add(createLowerSwitchPass()); - - PM.add(createLowerConstantExpressionsPass()); - - // Make sure that no unreachable blocks are instruction selected. - PM.add(createUnreachableBlockEliminationPass()); - - PM.add(createPPC32ISelSimple(*this)); - - if (PrintMachineCode) - PM.add(createMachineFunctionPrinterPass(&std::cerr)); - - PM.add(createRegisterAllocator()); - - if (PrintMachineCode) - PM.add(createMachineFunctionPrinterPass(&std::cerr)); - - // I want a PowerPC specific prolog/epilog code inserter so I can put the - // fills/spills in the right spots. - PM.add(createPowerPCPEI()); - - // Must run branch selection immediately preceding the printer - PM.add(createPPCBranchSelectionPass()); - PM.add(createPPC32AsmPrinter(Out, *this)); - PM.add(createMachineCodeDeleter()); - return false; -} - -/// addPassesToJITCompile - Add passes to the specified pass manager to -/// implement a fast dynamic compiler for this target. -/// -void PPC32JITInfo::addPassesToJITCompile(FunctionPassManager &PM) { - // FIXME: Implement efficient support for garbage collection intrinsics. - PM.add(createLowerGCPass()); - - // FIXME: Implement the invoke/unwind instructions! - PM.add(createLowerInvokePass()); - - // FIXME: Implement the switch instruction in the instruction selector! - PM.add(createLowerSwitchPass()); - - PM.add(createLowerConstantExpressionsPass()); - - // Make sure that no unreachable blocks are instruction selected. - PM.add(createUnreachableBlockEliminationPass()); - - PM.add(createPPC32ISelSimple(TM)); - PM.add(createRegisterAllocator()); - PM.add(createPrologEpilogCodeInserter()); -} - -unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) { - if (M.getEndianness() == Module::BigEndian && - M.getPointerSize() == Module::Pointer32) - return 10; // Direct match - else if (M.getEndianness() != Module::AnyEndianness || - M.getPointerSize() != Module::AnyPointerSize) - return 0; // Match for some other target - - return getJITMatchQuality()/2; -} diff --git a/lib/Target/PowerPC/PPC64.h b/lib/Target/PowerPC/PPC64.h deleted file mode 100644 index 2cfcb5d3ea2..00000000000 --- a/lib/Target/PowerPC/PPC64.h +++ /dev/null @@ -1,20 +0,0 @@ -//===-- PPC64.h - Top-level interface for AIX/PowerPC -------------*- C++ -*-// -// -// The LLVM Compiler Infrastructure -// -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file contains the entry points for global functions defined in the LLVM -// PowerPC 64-bit back-end. -// -//===----------------------------------------------------------------------===// - -#ifndef TARGET_POWERPC_AIX_H -#define TARGET_POWERPC_AIX_H - -#include "PowerPC.h" - -#endif diff --git a/lib/Target/PowerPC/PPC64JITInfo.h b/lib/Target/PowerPC/PPC64JITInfo.h index c18b01511e2..cf553f4c112 100644 --- a/lib/Target/PowerPC/PPC64JITInfo.h +++ b/lib/Target/PowerPC/PPC64JITInfo.h @@ -23,12 +23,6 @@ namespace llvm { public: PPC64JITInfo(TargetMachine &tm) : PowerPCJITInfo(tm) {} - /// addPassesToJITCompile - Add passes to the specified pass manager to - /// implement a fast dynamic compiler for this target. Return true if this - /// is not supported for this target. - /// - virtual void addPassesToJITCompile(FunctionPassManager &PM); - /// replaceMachineCodeForFunction - Make it so that calling the function /// whose machine code is at OLD turns into a call to NEW, perhaps by /// overwriting OLD with a branch to NEW. This is used for self-modifying diff --git a/lib/Target/PowerPC/PPC64TargetMachine.cpp b/lib/Target/PowerPC/PPC64TargetMachine.cpp deleted file mode 100644 index 1f11268e93d..00000000000 --- a/lib/Target/PowerPC/PPC64TargetMachine.cpp +++ /dev/null @@ -1,117 +0,0 @@ -//===-- PPC64TargetMachine.cpp - Define TargetMachine for AIX/PowerPC ----===// -// -// The LLVM Compiler Infrastructure -// -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// -//===----------------------------------------------------------------------===// - -#include "PowerPC.h" -#include "PPC64JITInfo.h" -#include "PPC64TargetMachine.h" -#include "llvm/Module.h" -#include "llvm/PassManager.h" -#include "llvm/CodeGen/IntrinsicLowering.h" -#include "llvm/CodeGen/MachineFunction.h" -#include "llvm/CodeGen/Passes.h" -#include "llvm/Target/TargetOptions.h" -#include "llvm/Target/TargetMachineRegistry.h" -#include "llvm/Transforms/Scalar.h" -#include -using namespace llvm; - -namespace { - const std::string PPC64 = "AIX/PowerPC"; - // Register the target - RegisterTarget - X("powerpc-aix", " AIX/PowerPC (experimental)"); -} - -/// PPC64TargetMachine ctor -/// -PPC64TargetMachine::PPC64TargetMachine(const Module &M, IntrinsicLowering *IL) - // FIXME: this is wrong! - : PowerPCTargetMachine(PPC64, IL, - TargetData(PPC64,false,8,4,4,4,4,4,2,1,4), - TargetFrameInfo(TargetFrameInfo::StackGrowsDown,16,-4), - PPC64JITInfo(*this)) {} - -/// addPassesToEmitAssembly - Add passes to the specified pass manager -/// to implement a static compiler for this target. -/// -bool PPC64TargetMachine::addPassesToEmitAssembly(PassManager &PM, - std::ostream &Out) { - // FIXME: Implement efficient support for garbage collection intrinsics. - PM.add(createLowerGCPass()); - - // FIXME: Implement the invoke/unwind instructions! - PM.add(createLowerInvokePass()); - - // FIXME: Implement the switch instruction in the instruction selector! - PM.add(createLowerSwitchPass()); - - PM.add(createLowerConstantExpressionsPass()); - - // Make sure that no unreachable blocks are instruction selected. - PM.add(createUnreachableBlockEliminationPass()); - - // FIXME: instruction selector! - //PM.add(createPPCSimpleInstructionSelector(*this)); - - if (PrintMachineCode) - PM.add(createMachineFunctionPrinterPass(&std::cerr)); - - PM.add(createRegisterAllocator()); - - if (PrintMachineCode) - PM.add(createMachineFunctionPrinterPass(&std::cerr)); - - // I want a PowerPC specific prolog/epilog code inserter so I can put the - // fills/spills in the right spots. - //PM.add(createPowerPCPEI()); - - // Must run branch selection immediately preceding the printer - //PM.add(createPPCBranchSelectionPass()); - //PM.add(createPPC32AsmPrinterPass(Out, *this)); - PM.add(createMachineCodeDeleter()); - return false; -} - -/// addPassesToJITCompile - Add passes to the specified pass manager to -/// implement a fast dynamic compiler for this target. -/// -void PPC64JITInfo::addPassesToJITCompile(FunctionPassManager &PM) { - // FIXME: Implement efficient support for garbage collection intrinsics. - PM.add(createLowerGCPass()); - - // FIXME: Implement the invoke/unwind instructions! - PM.add(createLowerInvokePass()); - - // FIXME: Implement the switch instruction in the instruction selector! - PM.add(createLowerSwitchPass()); - - PM.add(createLowerConstantExpressionsPass()); - - // Make sure that no unreachable blocks are instruction selected. - PM.add(createUnreachableBlockEliminationPass()); - - // FIXME: ISel - //PM.add(createPPCSimpleInstructionSelector(TM)); - PM.add(createRegisterAllocator()); - PM.add(createPrologEpilogCodeInserter()); -} - -unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) { - if (M.getEndianness() == Module::BigEndian && - M.getPointerSize() == Module::Pointer64) - return 10; // Direct match - else if (M.getEndianness() != Module::AnyEndianness || - M.getPointerSize() != Module::AnyPointerSize) - return 0; // Match for some other target - - return getJITMatchQuality()/2; -} diff --git a/lib/Target/PowerPC/PPC64TargetMachine.h b/lib/Target/PowerPC/PPC64TargetMachine.h index d0bac8cba33..dc2c1a4c677 100644 --- a/lib/Target/PowerPC/PPC64TargetMachine.h +++ b/lib/Target/PowerPC/PPC64TargetMachine.h @@ -31,8 +31,6 @@ public: virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM, MachineCodeEmitter &MCE); - virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out); - static unsigned getModuleMatchQuality(const Module &M); }; diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp index 60ddcde57ab..8959ed4a504 100644 --- a/lib/Target/PowerPC/PPCTargetMachine.cpp +++ b/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -10,8 +10,12 @@ // //===----------------------------------------------------------------------===// -#include "PowerPCTargetMachine.h" #include "PowerPC.h" +#include "PowerPCTargetMachine.h" +#include "PPC32TargetMachine.h" +#include "PPC64TargetMachine.h" +#include "PPC32JITInfo.h" +#include "PPC64JITInfo.h" #include "llvm/Module.h" #include "llvm/PassManager.h" #include "llvm/CodeGen/IntrinsicLowering.h" @@ -20,9 +24,25 @@ #include "llvm/Target/TargetOptions.h" #include "llvm/Target/TargetMachineRegistry.h" #include "llvm/Transforms/Scalar.h" +#include "Support/CommandLine.h" #include using namespace llvm; +namespace { + cl::opt + AIX("aix", + cl::desc("Generate AIX/xcoff rather than Darwin/macho"), + cl::Hidden); + const std::string PPC32 = "PowerPC/32bit"; + const std::string PPC64 = "PowerPC/64bit"; + + // Register the targets + RegisterTarget + X("ppc32", " PowerPC 32bit (experimental)"); + RegisterTarget + Y("ppc64", " PowerPC 64bit (unimplemented)"); +} + PowerPCTargetMachine::PowerPCTargetMachine(const std::string &name, IntrinsicLowering *IL, const TargetData &TD, @@ -38,8 +58,74 @@ unsigned PowerPCTargetMachine::getJITMatchQuality() { #endif } +/// addPassesToEmitAssembly - Add passes to the specified pass manager +/// to implement a static compiler for this target. +/// +bool PowerPCTargetMachine::addPassesToEmitAssembly(PassManager &PM, + std::ostream &Out) { + bool LP64 = (0 != dynamic_cast(this)); + + // FIXME: Implement efficient support for garbage collection intrinsics. + PM.add(createLowerGCPass()); + + // FIXME: Implement the invoke/unwind instructions! + PM.add(createLowerInvokePass()); + + // FIXME: Implement the switch instruction in the instruction selector! + PM.add(createLowerSwitchPass()); + + PM.add(createLowerConstantExpressionsPass()); + + // Make sure that no unreachable blocks are instruction selected. + PM.add(createUnreachableBlockEliminationPass()); + + if (LP64) + PM.add(createPPC32ISelSimple(*this)); + else + PM.add(createPPC32ISelSimple(*this)); + + if (PrintMachineCode) + PM.add(createMachineFunctionPrinterPass(&std::cerr)); + + PM.add(createRegisterAllocator()); + + if (PrintMachineCode) + PM.add(createMachineFunctionPrinterPass(&std::cerr)); + + // I want a PowerPC specific prolog/epilog code inserter so I can put the + // fills/spills in the right spots. + PM.add(createPowerPCPEI()); + + // Must run branch selection immediately preceding the printer + PM.add(createPPCBranchSelectionPass()); + + if (AIX) + PM.add(createPPC32AsmPrinter(Out, *this)); + else + PM.add(createPPC32AsmPrinter(Out, *this)); + + PM.add(createMachineCodeDeleter()); + return false; +} + void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) { - assert(0 && "Cannot execute PowerPCJITInfo::addPassesToJITCompile()"); + // FIXME: Implement efficient support for garbage collection intrinsics. + PM.add(createLowerGCPass()); + + // FIXME: Implement the invoke/unwind instructions! + PM.add(createLowerInvokePass()); + + // FIXME: Implement the switch instruction in the instruction selector! + PM.add(createLowerSwitchPass()); + + PM.add(createLowerConstantExpressionsPass()); + + // Make sure that no unreachable blocks are instruction selected. + PM.add(createUnreachableBlockEliminationPass()); + + PM.add(createPPC32ISelSimple(TM)); + PM.add(createRegisterAllocator()); + PM.add(createPrologEpilogCodeInserter()); } void PowerPCJITInfo::replaceMachineCodeForFunction(void *Old, void *New) { @@ -51,3 +137,42 @@ void *PowerPCJITInfo::getJITStubForFunction(Function *F, assert(0 && "Cannot execute PowerPCJITInfo::getJITStubForFunction()"); return 0; } + +/// PowerPCTargetMachine ctor - Create an ILP32 architecture model +/// +PPC32TargetMachine::PPC32TargetMachine(const Module &M, + IntrinsicLowering *IL) + : PowerPCTargetMachine(PPC32, IL, + TargetData(PPC32,false,4,4,4,4,4,4,2,1,4), + TargetFrameInfo(TargetFrameInfo::StackGrowsDown,16,0), + PPC32JITInfo(*this)) {} + +/// PPC64TargetMachine ctor - Create a LP64 architecture model +/// +PPC64TargetMachine::PPC64TargetMachine(const Module &M, IntrinsicLowering *IL) + : PowerPCTargetMachine(PPC64, IL, + TargetData(PPC64,false,8,4,4,4,4,4,2,1,4), + TargetFrameInfo(TargetFrameInfo::StackGrowsDown,16,0), + PPC64JITInfo(*this)) {} + +unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) { + if (M.getEndianness() == Module::BigEndian && + M.getPointerSize() == Module::Pointer32) + return 10; // Direct match + else if (M.getEndianness() != Module::AnyEndianness || + M.getPointerSize() != Module::AnyPointerSize) + return 0; // Match for some other target + + return getJITMatchQuality()/2; +} + +unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) { + if (M.getEndianness() == Module::BigEndian && + M.getPointerSize() == Module::Pointer64) + return 10; // Direct match + else if (M.getEndianness() != Module::AnyEndianness || + M.getPointerSize() != Module::AnyPointerSize) + return 0; // Match for some other target + + return getJITMatchQuality()/2; +} diff --git a/lib/Target/PowerPC/PPCTargetMachine.h b/lib/Target/PowerPC/PPCTargetMachine.h index 4b4d2c548c5..b2f82aa9868 100644 --- a/lib/Target/PowerPC/PPCTargetMachine.h +++ b/lib/Target/PowerPC/PPCTargetMachine.h @@ -38,14 +38,7 @@ public: virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM, MachineCodeEmitter &MCE); - virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out); - static unsigned getModuleMatchQuality(const Module &M); - - // Two shared sets between the instruction selector and the printer allow for - // correct linkage on Darwin - std::set CalledFunctions; - std::set AddressTaken; }; } // end namespace llvm diff --git a/lib/Target/PowerPC/PowerPCTargetMachine.h b/lib/Target/PowerPC/PowerPCTargetMachine.h index cf78943a491..cef99119ce7 100644 --- a/lib/Target/PowerPC/PowerPCTargetMachine.h +++ b/lib/Target/PowerPC/PowerPCTargetMachine.h @@ -46,6 +46,13 @@ public: } static unsigned getJITMatchQuality(); + + virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out); + + // Two shared sets between the instruction selector and the printer allow for + // correct linkage on Darwin + std::set CalledFunctions; + std::set AddressTaken; }; } // end namespace llvm