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For PR9438:
--- Merging r127350 into '.': D test/CodeGen/X86/2009-03-11-CoalescerBug.ll --- Merging r127351 into '.': A test/CodeGen/X86/2011-03-09-Physreg-Coalescing.ll U test/CodeGen/X86/fold-pcmpeqd-2.ll U lib/CodeGen/SimpleRegisterCoalescing.cpp git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_29@127384 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1038,9 +1038,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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const TargetRegisterClass *RC = mri_->getRegClass(CP.getSrcReg());
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const TargetRegisterClass *RC = mri_->getRegClass(CP.getSrcReg());
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unsigned Threshold = allocatableRCRegs_[RC].count() * 2;
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unsigned Threshold = allocatableRCRegs_[RC].count() * 2;
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unsigned Length = li_->getApproximateInstructionCount(JoinVInt);
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unsigned Length = li_->getApproximateInstructionCount(JoinVInt);
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if (Length > Threshold &&
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if (Length > Threshold) {
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std::distance(mri_->use_nodbg_begin(CP.getSrcReg()),
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mri_->use_nodbg_end()) * Threshold < Length) {
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// Before giving up coalescing, if definition of source is defined by
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// Before giving up coalescing, if definition of source is defined by
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// trivial computation, try rematerializing it.
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// trivial computation, try rematerializing it.
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if (!CP.isFlipped() &&
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if (!CP.isFlipped() &&
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@ -1,85 +0,0 @@
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; RUN: llc < %s -mtriple=i386-apple-darwin9 -stats |& grep regcoalescing | grep commuting
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@lookupTable5B = external global [64 x i32], align 32 ; <[64 x i32]*> [#uses=1]
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@lookupTable3B = external global [16 x i32], align 32 ; <[16 x i32]*> [#uses=1]
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@disparity0 = external global i32 ; <i32*> [#uses=5]
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@disparity1 = external global i32 ; <i32*> [#uses=3]
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define i32 @calc(i32 %theWord, i32 %k) nounwind {
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entry:
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%0 = lshr i32 %theWord, 3 ; <i32> [#uses=1]
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%1 = and i32 %0, 31 ; <i32> [#uses=1]
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%2 = shl i32 %k, 5 ; <i32> [#uses=1]
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%3 = or i32 %1, %2 ; <i32> [#uses=1]
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%4 = and i32 %theWord, 7 ; <i32> [#uses=1]
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%5 = shl i32 %k, 3 ; <i32> [#uses=1]
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%6 = or i32 %5, %4 ; <i32> [#uses=1]
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%7 = getelementptr [64 x i32]* @lookupTable5B, i32 0, i32 %3 ; <i32*> [#uses=1]
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%8 = load i32* %7, align 4 ; <i32> [#uses=5]
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%9 = getelementptr [16 x i32]* @lookupTable3B, i32 0, i32 %6 ; <i32*> [#uses=1]
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%10 = load i32* %9, align 4 ; <i32> [#uses=5]
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%11 = and i32 %8, 65536 ; <i32> [#uses=1]
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%12 = icmp eq i32 %11, 0 ; <i1> [#uses=1]
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br i1 %12, label %bb1, label %bb
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bb: ; preds = %entry
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%13 = and i32 %8, 994 ; <i32> [#uses=1]
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%14 = load i32* @disparity0, align 4 ; <i32> [#uses=2]
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store i32 %14, i32* @disparity1, align 4
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br label %bb8
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bb1: ; preds = %entry
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%15 = lshr i32 %8, 18 ; <i32> [#uses=1]
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%16 = and i32 %15, 1 ; <i32> [#uses=1]
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%17 = load i32* @disparity0, align 4 ; <i32> [#uses=4]
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%18 = icmp eq i32 %16, %17 ; <i1> [#uses=1]
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%not = select i1 %18, i32 0, i32 994 ; <i32> [#uses=1]
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%.masked = and i32 %8, 994 ; <i32> [#uses=1]
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%result.1 = xor i32 %not, %.masked ; <i32> [#uses=2]
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%19 = and i32 %8, 524288 ; <i32> [#uses=1]
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%20 = icmp eq i32 %19, 0 ; <i1> [#uses=1]
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br i1 %20, label %bb7, label %bb6
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bb6: ; preds = %bb1
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%21 = xor i32 %17, 1 ; <i32> [#uses=2]
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store i32 %21, i32* @disparity1, align 4
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br label %bb8
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bb7: ; preds = %bb1
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store i32 %17, i32* @disparity1, align 4
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br label %bb8
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bb8: ; preds = %bb7, %bb6, %bb
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%22 = phi i32 [ %17, %bb7 ], [ %21, %bb6 ], [ %14, %bb ] ; <i32> [#uses=4]
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%result.0 = phi i32 [ %result.1, %bb7 ], [ %result.1, %bb6 ], [ %13, %bb ] ; <i32> [#uses=2]
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%23 = and i32 %10, 65536 ; <i32> [#uses=1]
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%24 = icmp eq i32 %23, 0 ; <i1> [#uses=1]
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br i1 %24, label %bb10, label %bb9
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bb9: ; preds = %bb8
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%25 = and i32 %10, 29 ; <i32> [#uses=1]
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%26 = or i32 %result.0, %25 ; <i32> [#uses=1]
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store i32 %22, i32* @disparity0, align 4
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ret i32 %26
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bb10: ; preds = %bb8
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%27 = lshr i32 %10, 18 ; <i32> [#uses=1]
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%28 = and i32 %27, 1 ; <i32> [#uses=1]
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%29 = icmp eq i32 %28, %22 ; <i1> [#uses=1]
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%not13 = select i1 %29, i32 0, i32 29 ; <i32> [#uses=1]
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%.masked20 = and i32 %10, 29 ; <i32> [#uses=1]
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%.pn = xor i32 %not13, %.masked20 ; <i32> [#uses=1]
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%result.3 = or i32 %.pn, %result.0 ; <i32> [#uses=2]
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%30 = and i32 %10, 524288 ; <i32> [#uses=1]
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%31 = icmp eq i32 %30, 0 ; <i1> [#uses=1]
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br i1 %31, label %bb17, label %bb16
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bb16: ; preds = %bb10
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%32 = xor i32 %22, 1 ; <i32> [#uses=1]
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store i32 %32, i32* @disparity0, align 4
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ret i32 %result.3
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bb17: ; preds = %bb10
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store i32 %22, i32* @disparity0, align 4
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ret i32 %result.3
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}
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22
test/CodeGen/X86/2011-03-09-Physreg-Coalescing.ll
Normal file
22
test/CodeGen/X86/2011-03-09-Physreg-Coalescing.ll
Normal file
@ -0,0 +1,22 @@
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; RUN: llc -mcpu=yonah < %s
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; PR9438
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
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target triple = "i386-unknown-freebsd9.0"
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; The 'call fastcc' ties down %ebx, %ecx, and %edx.
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; A MUL8r ties down %al, leaving no GR32_ABCD registers available.
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; The coalescer can easily overallocate physical registers,
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; and register allocation fails.
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declare fastcc i8* @save_string(i8* %d, i8* nocapture %s) nounwind
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define i32 @cvtchar(i8* nocapture %sp) nounwind {
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%temp.i = alloca [2 x i8], align 1
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%tmp1 = load i8* %sp, align 1
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%div = udiv i8 %tmp1, 10
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%rem = urem i8 %div, 10
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%arrayidx.i = getelementptr inbounds [2 x i8]* %temp.i, i32 0, i32 0
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store i8 %rem, i8* %arrayidx.i, align 1
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%call.i = call fastcc i8* @save_string(i8* %sp, i8* %arrayidx.i) nounwind
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ret i32 undef
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}
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@ -1,10 +1,20 @@
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; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah | not grep pcmpeqd
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; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep pcmpeqd | count 1
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; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
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; This testcase should need to spill the -1 value on x86-32,
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; This testcase should need to spill the -1 value on both x86-32 and x86-64,
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; so it shouldn't use pcmpeqd to materialize an all-ones vector; it
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; so it shouldn't use pcmpeqd to materialize an all-ones vector; it
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; should use a constant-pool load instead.
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; should use a constant-pool load instead.
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; Constant pool all-ones vector:
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; CHECK: .long 4294967295
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; CHECK-NEXT: .long 4294967295
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; CHECK-NEXT: .long 4294967295
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; CHECK-NEXT: .long 4294967295
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; No pcmpeqd instructions, everybody uses the constant pool.
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; CHECK: program_1:
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; CHECK-NOT: pcmpeqd
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%struct.__ImageExecInfo = type <{ <4 x i32>, <4 x float>, <2 x i64>, i8*, i8*, i8*, i32, i32, i32, i32, i32 }>
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%struct.__ImageExecInfo = type <{ <4 x i32>, <4 x float>, <2 x i64>, i8*, i8*, i8*, i32, i32, i32, i32, i32 }>
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%struct._cl_image_format_t = type <{ i32, i32, i32 }>
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%struct._cl_image_format_t = type <{ i32, i32, i32 }>
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%struct._image2d_t = type <{ i8*, %struct._cl_image_format_t, i32, i32, i32, i32, i32, i32 }>
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%struct._image2d_t = type <{ i8*, %struct._cl_image_format_t, i32, i32, i32, i32, i32, i32 }>
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@ -57,6 +67,7 @@ forbody: ; preds = %forcond
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%bitcast11.i6 = bitcast <4 x float> %tmp83 to <4 x i32> ; <<4 x i32>> [#uses=1]
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%bitcast11.i6 = bitcast <4 x float> %tmp83 to <4 x i32> ; <<4 x i32>> [#uses=1]
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%not.i7 = xor <4 x i32> zeroinitializer, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1]
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%not.i7 = xor <4 x i32> zeroinitializer, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1]
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%andnps.i8 = and <4 x i32> %bitcast11.i6, %not.i7 ; <<4 x i32>> [#uses=1]
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%andnps.i8 = and <4 x i32> %bitcast11.i6, %not.i7 ; <<4 x i32>> [#uses=1]
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call void null(<4 x float> %mul313, <4 x float> %cmpunord.i11, <4 x float> %tmp83, <4 x float> zeroinitializer, %struct.__ImageExecInfo* null, <4 x i32> zeroinitializer) nounwind
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%orps.i9 = or <4 x i32> %andnps.i8, %andps.i5 ; <<4 x i32>> [#uses=1]
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%orps.i9 = or <4 x i32> %andnps.i8, %andps.i5 ; <<4 x i32>> [#uses=1]
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%bitcast17.i10 = bitcast <4 x i32> %orps.i9 to <4 x float> ; <<4 x float>> [#uses=1]
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%bitcast17.i10 = bitcast <4 x i32> %orps.i9 to <4 x float> ; <<4 x float>> [#uses=1]
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%tmp84 = call <4 x float> @llvm.x86.sse.min.ps(<4 x float> %mul313, <4 x float> zeroinitializer) nounwind ; <<4 x float>> [#uses=1]
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%tmp84 = call <4 x float> @llvm.x86.sse.min.ps(<4 x float> %mul313, <4 x float> zeroinitializer) nounwind ; <<4 x float>> [#uses=1]
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