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added fp extend and removed a forgotten assert in more than 6 arg support (should break somewhere else now :) ) and fix an incorrect asm sequence for indirect calls

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19938 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Lenharth 2005-01-30 20:42:36 +00:00
parent b32d785e18
commit 7b2a5270b7
2 changed files with 33 additions and 23 deletions
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38
lib/Target/Alpha/AlphaISelPattern.cpp
View File

@ -307,6 +307,12 @@ unsigned ISel::SelectExprFP(SDOperand N, unsigned Result)
Node->dump();
assert(0 && "Node not handled!\n");
case ISD::FP_EXTEND:
assert (DestType == MVT::f64 && N.getOperand(0).getValueType() == MVT::f32 && "only f32 to f64 conversion supported here");
Tmp1 = SelectExpr(N.getOperand(0));
BuildMI(BB, Alpha::CVTST, 1, Result).addReg(Tmp1);
return Result;
case ISD::CopyFromReg:
{
// Make sure we generate both values.
@ -584,7 +590,7 @@ unsigned ISel::SelectExpr(SDOperand N) {
//grab the arguments
std::vector<unsigned> argvregs;
assert(Node->getNumOperands() < 8 && "Only 6 args supported");
//assert(Node->getNumOperands() < 8 && "Only 6 args supported");
for(int i = 2, e = Node->getNumOperands(); i < e; ++i)
argvregs.push_back(SelectExpr(N.getOperand(i)));
@ -640,23 +646,23 @@ unsigned ISel::SelectExpr(SDOperand N) {
}
//build the right kind of call
if (GlobalAddressSDNode *GASD =
dyn_cast<GlobalAddressSDNode>(N.getOperand(1)))
{
AlphaLowering.restoreGP(BB);
BuildMI(BB, Alpha::CALL, 1).addGlobalAddress(GASD->getGlobal(),true);
}
dyn_cast<GlobalAddressSDNode>(N.getOperand(1)))
{
AlphaLowering.restoreGP(BB);
BuildMI(BB, Alpha::CALL, 1).addGlobalAddress(GASD->getGlobal(),true);
}
else if (ExternalSymbolSDNode *ESSDN =
dyn_cast<ExternalSymbolSDNode>(N.getOperand(1)))
{
AlphaLowering.restoreGP(BB);
BuildMI(BB, Alpha::CALL, 0).addExternalSymbol(ESSDN->getSymbol(), true);
}
dyn_cast<ExternalSymbolSDNode>(N.getOperand(1)))
{
AlphaLowering.restoreGP(BB);
BuildMI(BB, Alpha::CALL, 0).addExternalSymbol(ESSDN->getSymbol(), true);
}
else
{
Tmp1 = SelectExpr(N.getOperand(1));
AlphaLowering.restoreGP(BB);
BuildMI(BB, Alpha::CALL, 1).addReg(Tmp1);
}
{
//no need to restore GP as we are doing an indirect call
Tmp1 = SelectExpr(N.getOperand(1));
BuildMI(BB, Alpha::JSR, 2, Alpha::R26).addReg(Tmp1).addImm(1);
}
//push the result into a virtual register

18
lib/Target/Alpha/AlphaInstrInfo.td
View File

@ -246,15 +246,19 @@ let isReturn = 1, isTerminator = 1 in
def RET : MForm< 0x1A, (ops GPRC:$RD, GPRC:$RS), "ret $RD,($RS),1">; //Return from subroutine
def JMP : MForm< 0x1A, (ops GPRC:$RD, GPRC:$RS), "jmp $RD,($RS),0">; //Jump
let isCall = 1 in
let Defs = [R0, R1, R2, R3, R4, R5, R6, R7, R8, R16, R17, R18, R19, R20, R21, R22, R23, R24, R25, R27, R29] in
let isCall = 1,
Defs = [R0, R1, R2, R3, R4, R5, R6, R7, R8, R16, R17, R18, R19,
R20, R21, R22, R23, R24, R25, R26, R27, R29,
F0, F1,
F10, F11, F12, F13, F14, F15, F16, F17, F18, F19,
F20, F21, F22, F23, F24, F25, F26, F27, F28, F29, F30],
Uses = [R27, R29] in {
def JSR : MForm< 0x1A, (ops GPRC:$RD, GPRC:$RS, s14imm:$DISP), "jsr $RD,($RS),$DISP">; //Jump to subroutine
def JSR_COROUTINE : MForm< 0x1A, (ops GPRC:$RD, GPRC:$RS), "jsr_coroutine $RD,($RS),1">; //Jump to subroutine return
def BR : BForm<0x30, (ops GPRC:$RD, s21imm:$DISP), "br $RD,$DISP">; //Branch
let isCall = 1 in
let Defs = [R0, R1, R2, R3, R4, R5, R6, R7, R8, R16, R17, R18, R19, R20, R21, R22, R23, R24, R25, R27, R29] in
def BSR : BForm<0x34, (ops GPRC:$RD, s21imm:$DISP), "bsr $RD,$DISP">; //Branch to subroutine
}
def JSR_COROUTINE : MForm< 0x1A, (ops GPRC:$RD, GPRC:$RS), "jsr_coroutine $RD,($RS),1">; //Jump to subroutine return
def BR : BForm<0x30, (ops GPRC:$RD, s21imm:$DISP), "br $RD,$DISP">; //Branch
//Stores, int
def STB : MForm<0x0E, (ops GPRC:$RA, s16imm:$DISP, GPRC:$RB), "stb $RA,$DISP($RB)">; // Store byte