From 7b426cee22a3cac030ec7ace0be04ee8569f18c7 Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Tue, 24 Jan 2012 00:12:39 +0000 Subject: [PATCH] Fix typo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148757 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMInstrNEON.td | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/Target/ARM/ARMInstrNEON.td b/lib/Target/ARM/ARMInstrNEON.td index 398369fec44..e369fc1e7d4 100644 --- a/lib/Target/ARM/ARMInstrNEON.td +++ b/lib/Target/ARM/ARMInstrNEON.td @@ -6026,7 +6026,7 @@ def VLD3LNqWB_register_Asm_32 : (ins VecListThreeQWordIndexed:$list, addrmode6:$addr, rGPR:$Rm, pred:$p)>; -// VLD3 multiple structurepseudo-instructions. These need special handling for +// VLD3 multiple structure pseudo-instructions. These need special handling for // the vector operands that the normal instructions don't yet model. // FIXME: Remove these when the register classes and instructions are updated. def VLD3dAsm_8 : NEONDataTypeAsmPseudoInst<"vld3${p}", ".8", "$list, $addr", @@ -6135,7 +6135,7 @@ def VST3LNqWB_register_Asm_32 : rGPR:$Rm, pred:$p)>; -// VST3 multiple structurepseudo-instructions. These need special handling for +// VST3 multiple structure pseudo-instructions. These need special handling for // the vector operands that the normal instructions don't yet model. // FIXME: Remove these when the register classes and instructions are updated. def VST3dAsm_8 : NEONDataTypeAsmPseudoInst<"vst3${p}", ".8", "$list, $addr",