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Remove custom expansion from LegalizeTypes when doing
soft float: experiments show that targets aren't expecting this for results or for operands. Add support select/select_cc result soft float and correct operand soft float for these. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53245 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -48,18 +48,6 @@ void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
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cerr << "\n");
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SDOperand R = SDOperand();
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// See if the target wants to custom expand this node.
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if (TLI.getOperationAction(N->getOpcode(), N->getValueType(ResNo)) ==
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TargetLowering::Custom) {
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// If the target wants to, allow it to lower this itself.
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if (SDNode *P = TLI.ReplaceNodeResults(N, DAG)) {
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// Everything that once used N now uses P. We are guaranteed that the
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// result value types of N and the result value types of P match.
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ReplaceNodeWith(N, P);
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return;
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}
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}
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switch (N->getOpcode()) {
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default:
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#ifndef NDEBUG
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@ -78,6 +66,8 @@ void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
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case ISD::FP_EXTEND: R = SoftenFloatRes_FP_EXTEND(N); break;
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case ISD::FP_ROUND: R = SoftenFloatRes_FP_ROUND(N); break;
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case ISD::LOAD: R = SoftenFloatRes_LOAD(N); break;
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case ISD::SELECT: R = SoftenFloatRes_SELECT(N); break;
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case ISD::SELECT_CC: R = SoftenFloatRes_SELECT_CC(N); break;
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case ISD::SINT_TO_FP:
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case ISD::UINT_TO_FP: R = SoftenFloatRes_XINT_TO_FP(N); break;
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@ -244,6 +234,19 @@ SDOperand DAGTypeLegalizer::SoftenFloatRes_LOAD(SDNode *N) {
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return BitConvertToInteger(DAG.getNode(ISD::FP_EXTEND, VT, NL));
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}
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SDOperand DAGTypeLegalizer::SoftenFloatRes_SELECT(SDNode *N) {
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SDOperand LHS = GetSoftenedFloat(N->getOperand(1));
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SDOperand RHS = GetSoftenedFloat(N->getOperand(2));
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return DAG.getNode(ISD::SELECT, LHS.getValueType(), N->getOperand(0),LHS,RHS);
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}
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SDOperand DAGTypeLegalizer::SoftenFloatRes_SELECT_CC(SDNode *N) {
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SDOperand LHS = GetSoftenedFloat(N->getOperand(2));
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SDOperand RHS = GetSoftenedFloat(N->getOperand(3));
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return DAG.getNode(ISD::SELECT_CC, LHS.getValueType(), N->getOperand(0),
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N->getOperand(1), LHS, RHS, N->getOperand(4));
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}
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SDOperand DAGTypeLegalizer::SoftenFloatRes_XINT_TO_FP(SDNode *N) {
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bool isSigned = N->getOpcode() == ISD::SINT_TO_FP;
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MVT DestVT = N->getValueType(0);
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@ -352,29 +355,23 @@ SDOperand DAGTypeLegalizer::SoftenFloatRes_XINT_TO_FP(SDNode *N) {
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bool DAGTypeLegalizer::SoftenFloatOperand(SDNode *N, unsigned OpNo) {
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DEBUG(cerr << "Soften float operand " << OpNo << ": "; N->dump(&DAG);
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cerr << "\n");
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SDOperand Res(0, 0);
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SDOperand Res = SDOperand();
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if (TLI.getOperationAction(N->getOpcode(), N->getOperand(OpNo).getValueType())
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== TargetLowering::Custom)
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Res = TLI.LowerOperation(SDOperand(N, OpNo), DAG);
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if (Res.Val == 0) {
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switch (N->getOpcode()) {
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default:
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switch (N->getOpcode()) {
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default:
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#ifndef NDEBUG
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cerr << "SoftenFloatOperand Op #" << OpNo << ": ";
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N->dump(&DAG); cerr << "\n";
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cerr << "SoftenFloatOperand Op #" << OpNo << ": ";
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N->dump(&DAG); cerr << "\n";
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#endif
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assert(0 && "Do not know how to soften this operator's operand!");
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abort();
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assert(0 && "Do not know how to soften this operator's operand!");
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abort();
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case ISD::BIT_CONVERT: Res = SoftenFloatOp_BIT_CONVERT(N); break;
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case ISD::BIT_CONVERT: Res = SoftenFloatOp_BIT_CONVERT(N); break;
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case ISD::BR_CC: Res = SoftenFloatOp_BR_CC(N); break;
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case ISD::SELECT_CC: Res = SoftenFloatOp_SELECT_CC(N); break;
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case ISD::SETCC: Res = SoftenFloatOp_SETCC(N); break;
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case ISD::STORE: Res = SoftenFloatOp_STORE(N, OpNo); break;
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}
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case ISD::BR_CC: Res = SoftenFloatOp_BR_CC(N); break;
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case ISD::SELECT_CC: Res = SoftenFloatOp_SELECT_CC(N); break;
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case ISD::SETCC: Res = SoftenFloatOp_SETCC(N); break;
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case ISD::STORE: Res = SoftenFloatOp_STORE(N, OpNo); break;
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}
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// If the result is null, the sub-method took care of registering results etc.
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@ -403,8 +400,7 @@ void DAGTypeLegalizer::SoftenSetCCOperands(SDOperand &NewLHS, SDOperand &NewRHS,
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ISD::CondCode &CCCode) {
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SDOperand LHSInt = GetSoftenedFloat(NewLHS);
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SDOperand RHSInt = GetSoftenedFloat(NewRHS);
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MVT VT = NewLHS.getValueType();
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MVT NVT = LHSInt.getValueType();
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MVT VT = NewLHS.getValueType();
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assert((VT == MVT::f32 || VT == MVT::f64) && "Unsupported setcc type!");
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@ -468,13 +464,13 @@ void DAGTypeLegalizer::SoftenSetCCOperands(SDOperand &NewLHS, SDOperand &NewRHS,
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}
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SDOperand Ops[2] = { LHSInt, RHSInt };
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NewLHS = MakeLibCall(LC1, NVT, Ops, 2, false/*sign irrelevant*/);
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NewRHS = DAG.getConstant(0, NVT);
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NewLHS = MakeLibCall(LC1, MVT::i32, Ops, 2, false/*sign irrelevant*/);
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NewRHS = DAG.getConstant(0, MVT::i32);
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CCCode = TLI.getCmpLibcallCC(LC1);
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if (LC2 != RTLIB::UNKNOWN_LIBCALL) {
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SDOperand Tmp = DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(NewLHS),
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NewLHS, NewRHS,
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DAG.getCondCode(TLI.getCmpLibcallCC(LC1)));
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NewLHS = MakeLibCall(LC2, NVT, Ops, 2, false/*sign irrelevant*/);
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NewLHS, NewRHS, DAG.getCondCode(CCCode));
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NewLHS = MakeLibCall(LC2, MVT::i32, Ops, 2, false/*sign irrelevant*/);
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NewLHS = DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(NewLHS), NewLHS,
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NewRHS, DAG.getCondCode(TLI.getCmpLibcallCC(LC2)));
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NewLHS = DAG.getNode(ISD::OR, Tmp.getValueType(), Tmp, NewLHS);
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@ -794,7 +790,7 @@ void DAGTypeLegalizer::ExpandFloatRes_XINT_TO_FP(SDNode *N, SDOperand &Lo,
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/// need promotion or expansion as well as the specified one.
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bool DAGTypeLegalizer::ExpandFloatOperand(SDNode *N, unsigned OpNo) {
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DEBUG(cerr << "Expand float operand: "; N->dump(&DAG); cerr << "\n");
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SDOperand Res(0, 0);
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SDOperand Res = SDOperand();
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if (TLI.getOperationAction(N->getOpcode(), N->getOperand(OpNo).getValueType())
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== TargetLowering::Custom)
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@ -465,7 +465,7 @@ SDOperand DAGTypeLegalizer::PromoteIntRes_VAARG(SDNode *N) {
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/// node may need promotion or expansion as well as the specified one.
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bool DAGTypeLegalizer::PromoteIntegerOperand(SDNode *N, unsigned OpNo) {
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DEBUG(cerr << "Promote integer operand: "; N->dump(&DAG); cerr << "\n");
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SDOperand Res(0, 0);
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SDOperand Res = SDOperand();
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if (TLI.getOperationAction(N->getOpcode(), N->getOperand(OpNo).getValueType())
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== TargetLowering::Custom)
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@ -1641,7 +1641,7 @@ ExpandShiftWithKnownAmountBit(SDNode *N, SDOperand &Lo, SDOperand &Hi) {
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/// node may need promotion or expansion as well as the specified one.
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bool DAGTypeLegalizer::ExpandIntegerOperand(SDNode *N, unsigned OpNo) {
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DEBUG(cerr << "Expand integer operand: "; N->dump(&DAG); cerr << "\n");
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SDOperand Res(0, 0);
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SDOperand Res = SDOperand();
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if (TLI.getOperationAction(N->getOpcode(), N->getOperand(OpNo).getValueType())
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== TargetLowering::Custom)
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@ -338,6 +338,8 @@ private:
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SDOperand SoftenFloatRes_FP_ROUND(SDNode *N);
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SDOperand SoftenFloatRes_FSUB(SDNode *N);
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SDOperand SoftenFloatRes_LOAD(SDNode *N);
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SDOperand SoftenFloatRes_SELECT(SDNode *N);
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SDOperand SoftenFloatRes_SELECT_CC(SDNode *N);
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SDOperand SoftenFloatRes_XINT_TO_FP(SDNode *N);
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// Operand Float to Integer Conversion.
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@ -150,7 +150,7 @@ SDOperand DAGTypeLegalizer::ScalarizeVecRes_SELECT(SDNode *N) {
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bool DAGTypeLegalizer::ScalarizeOperand(SDNode *N, unsigned OpNo) {
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DEBUG(cerr << "Scalarize node operand " << OpNo << ": "; N->dump(&DAG);
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cerr << "\n");
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SDOperand Res(0, 0);
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SDOperand Res = SDOperand();
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if (Res.Val == 0) {
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switch (N->getOpcode()) {
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@ -535,7 +535,7 @@ void DAGTypeLegalizer::SplitVecRes_FPOWI(SDNode *N, SDOperand &Lo,
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/// node may need legalization as well as the specified one.
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bool DAGTypeLegalizer::SplitOperand(SDNode *N, unsigned OpNo) {
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DEBUG(cerr << "Split node operand: "; N->dump(&DAG); cerr << "\n");
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SDOperand Res(0, 0);
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SDOperand Res = SDOperand();
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if (Res.Val == 0) {
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switch (N->getOpcode()) {
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