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Print mflr using the asmwriter generator
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15749 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -27,6 +27,7 @@
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/ValueTypes.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Support/Mangler.h"
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#include "llvm/Support/Mangler.h"
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#include "Support/CommandLine.h"
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#include "Support/CommandLine.h"
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@ -82,6 +83,17 @@ namespace {
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void printMachineInstruction(const MachineInstr *MI);
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void printMachineInstruction(const MachineInstr *MI);
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void printOp(const MachineOperand &MO, bool LoadAddrOp = false);
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void printOp(const MachineOperand &MO, bool LoadAddrOp = false);
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void printImmOp(const MachineOperand &MO, unsigned ArgType);
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void printImmOp(const MachineOperand &MO, unsigned ArgType);
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void printOperand(const MachineInstr *MI, unsigned OpNo, MVT::ValueType VT){
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const MachineOperand &MO = MI->getOperand(OpNo);
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if (MO.getType() == MachineOperand::MO_MachineRegister) {
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assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physreg??");
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O << LowercaseString(TM.getRegisterInfo()->get(MO.getReg()).Name);
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} else {
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printOp(MO);
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}
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}
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void printConstantPool(MachineConstantPool *MCP);
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void printConstantPool(MachineConstantPool *MCP);
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bool runOnMachineFunction(MachineFunction &F);
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bool runOnMachineFunction(MachineFunction &F);
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bool doInitialization(Module &M);
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bool doInitialization(Module &M);
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@ -27,6 +27,7 @@
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/ValueTypes.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Support/Mangler.h"
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#include "llvm/Support/Mangler.h"
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#include "Support/CommandLine.h"
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#include "Support/CommandLine.h"
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@ -82,6 +83,17 @@ namespace {
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void printMachineInstruction(const MachineInstr *MI);
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void printMachineInstruction(const MachineInstr *MI);
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void printOp(const MachineOperand &MO, bool LoadAddrOp = false);
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void printOp(const MachineOperand &MO, bool LoadAddrOp = false);
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void printImmOp(const MachineOperand &MO, unsigned ArgType);
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void printImmOp(const MachineOperand &MO, unsigned ArgType);
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void printOperand(const MachineInstr *MI, unsigned OpNo, MVT::ValueType VT){
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const MachineOperand &MO = MI->getOperand(OpNo);
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if (MO.getType() == MachineOperand::MO_MachineRegister) {
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assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physreg??");
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O << LowercaseString(TM.getRegisterInfo()->get(MO.getReg()).Name);
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} else {
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printOp(MO);
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}
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}
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void printConstantPool(MachineConstantPool *MCP);
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void printConstantPool(MachineConstantPool *MCP);
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bool runOnMachineFunction(MachineFunction &F);
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bool runOnMachineFunction(MachineFunction &F);
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bool doInitialization(Module &M);
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bool doInitialization(Module &M);
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@ -15,7 +15,13 @@
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include "PowerPCInstrFormats.td"
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include "PowerPCInstrFormats.td"
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let isTerminator = 1, isReturn = 1 in
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let isTerminator = 1, isReturn = 1 in
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def BLR : XLForm_2_ext<"blr", 19, 16, 20, 31, 1, 0, 0>;
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def BLR : XLForm_2_ext<"blr", 19, 16, 20, 31, 1, 0, 0>;
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class II<dag OL, string asmstr> {
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dag OperandList = OL;
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string AsmString = asmstr;
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}
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// Pseudo-instructions:
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// Pseudo-instructions:
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def PHI : Pseudo<"PHI">; // PHI node...
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def PHI : Pseudo<"PHI">; // PHI node...
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@ -121,7 +127,8 @@ def LFSX : XForm_25<"lfsx", 31, 535, 0, 0>;
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def LFD : DForm_8<"lfd", 50, 0, 0>;
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def LFD : DForm_8<"lfd", 50, 0, 0>;
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def LFDX : XForm_25<"lfdx", 31, 599, 0, 0>;
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def LFDX : XForm_25<"lfdx", 31, 599, 0, 0>;
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def MFCR : XForm_5<"mfcr", 31, 19, 0, 0>;
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def MFCR : XForm_5<"mfcr", 31, 19, 0, 0>;
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def MFLR : XFXForm_1_ext<"mflr", 31, 399, 8, 0, 0>;
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def MFLR : XFXForm_1_ext<"", 31, 399, 8, 0, 0>,
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II<(ops GPRC:$reg), "mflr $reg">;
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def MFCTR : XFXForm_1_ext<"mfctr", 31, 399, 9, 0, 0>;
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def MFCTR : XFXForm_1_ext<"mfctr", 31, 399, 9, 0, 0>;
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def MTLR : XFXForm_7_ext<"mtlr", 31, 467, 8, 0, 0>;
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def MTLR : XFXForm_7_ext<"mtlr", 31, 467, 8, 0, 0>;
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def MTCTR : XFXForm_7_ext<"mtctr", 31, 467, 9, 0, 0>;
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def MTCTR : XFXForm_7_ext<"mtctr", 31, 467, 9, 0, 0>;
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