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Update ARM JIT emitter to account for ld/st multiple changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83192 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -998,7 +998,7 @@ void Emitter<CodeEmitter>::emitLoadStoreMultipleInstruction(
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Binary |= 0x1 << ARMII::W_BitShift;
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Binary |= 0x1 << ARMII::W_BitShift;
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// Set registers
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// Set registers
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for (unsigned i = 4, e = MI.getNumOperands(); i != e; ++i) {
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for (unsigned i = 5, e = MI.getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI.getOperand(i);
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const MachineOperand &MO = MI.getOperand(i);
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if (!MO.isReg() || MO.isImplicit())
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if (!MO.isReg() || MO.isImplicit())
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break;
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break;
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@ -1403,11 +1403,11 @@ void Emitter<CodeEmitter>::emitVFPLoadStoreMultipleInstruction(
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Binary |= 0x1 << ARMII::W_BitShift;
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Binary |= 0x1 << ARMII::W_BitShift;
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// First register is encoded in Dd.
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// First register is encoded in Dd.
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Binary |= encodeVFPRd(MI, 4);
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Binary |= encodeVFPRd(MI, 5);
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// Number of registers are encoded in offset field.
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// Number of registers are encoded in offset field.
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unsigned NumRegs = 1;
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unsigned NumRegs = 1;
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for (unsigned i = 5, e = MI.getNumOperands(); i != e; ++i) {
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for (unsigned i = 6, e = MI.getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI.getOperand(i);
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const MachineOperand &MO = MI.getOperand(i);
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if (!MO.isReg() || MO.isImplicit())
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if (!MO.isReg() || MO.isImplicit())
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break;
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break;
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